Connect an array of sc_port<sc_logic> to an sc_port<sc_lv>

[xilef97]

Hello,

I have an array of Full Adders, each of which having the output ports:

sc_in<sc_logic> a, b, c;
sc_out<sc_logic> sum, carry;

Now I want to combine the outputs of all my full adders into an sc_lv for convenience: 

sc_in<sc_lv<32>> a, b;
FullAdder fa[32];
sc_out<sc_lv<32>> sums;

// In the constructor, I would like to do something like
for (int i = 0; i < 32; ++i) {
    a[i].bind(fa[i].a);
    b[i].bind(fa[i].b);
    sums[i].bind(fa[i].sum);
    ...
}

What's the best way to accomplish this? Since I want to connect both input- and output-ports to the Full Adders, I don't think I can use an SC_METHOD, as I would need some sort of wait() after forwarding the inputs to the Full Adders before their outputs are ready, right?

 

Greetings and thanks in advance! 

[Matt Bone]

Quote

Now I want to combine the outputs of all my full adders into an sc_lv for convenience: 

Ports must be bound to a signal carrying the same type as the port, so you cannot bind to the individual bits of an sc_lv and will need to create individual signals that carry sc_logic. 

SC_METHOD can be used to connect the sc_lv to individual sc_logic signals. The sensitivity list of a method ensures it will run when needed so you don't have to manage any sort of "forwarding" wait. You can use something like this:

SC_MODULE(Add32) {
  sc_in<sc_lv<32>> a, b;
  FullAdder fa[32];
  sc_out<sc_lv<32>> sums;

  sc_signal<sc_logic> a_sig[32], b_sig[32];
  sc_signal<sc_logic> sum_sig[32];
  sc_signal<sc_logic> carry_sig[32];
  sc_signal<sc_logic> zero_sig;

  SC_HAS_PROCESS(Add32);
  Add32(sc_module_name nm = "Add32") {
    for (unsigned i=0; i < 32; i++) {
      fa[i].a(a_sig[i]);
      fa[i].b(b_sig[i]);
      fa[i].sum(sum_sig[i]);
      fa[i].carry(carry_sig[i]);
      if (i == 0) {
        fa[0].c(zero_sig);
      } else {
        fa[i].c(carry_sig[i-1]);
      }
    }

    // Methods to connect sc_lv <-> sc_logic
    SC_METHOD(connect_a);
    sensitive << a;
    SC_METHOD(connect_b);
    sensitive << b;
    SC_METHOD(connect_sums);
    for (unsigned i=0; i < 32; i++) {
      sensitive << sum_sig[i];
    }
    SC_METHOD(tie_zero);
    // no sensitivity, method runs one time at startup
  }

  void connect_a() {
    for (unsigned i=0; i<32; i++) { 
      a_sig[i].write(a.read()[i]); 
    }
  }
  void connect_b() {
    for (unsigned i=0; i<32; i++) {
      b_sig[i].write(b.read()[i]);
    }
  }
  void connect_sums() {
    sc_lv<32> sumval = 0;
    for (unsigned i=0; i<32; i++) { sumval[i] = sum_sig[i].read(); }
    sums.write(sumval);
  }
  void tie_zero() {
    zero_sig.write(sc_logic(0));
  }

};

Instead of plain arrays of signals and modules, you might consider using sc_vector, which makes naming an array of sc_objects easier.

[xilef97]

Thank you for your answer! It solved my issue.

I didn't think about using multiple SC_METHODS for the different ports, and I also didn't know that a signal could be used in a sensitivity list. That's why I thought I would need some sort of "wait". Nice to learn that!

I also already planned to switch to sc_vector, so I agree with you on that. 😉