XYHZ Posted July 13, 2021 Report Share Posted July 13, 2021 We found several possible problems in the pkt_switch routine under the example folder. Here are my suggestions. First, in the fifo.cpp file, the pkt_out method lacks the logic to reset the "full", which results in no more data being read after the fifo is full. Second, in Line 204, 210, 216 in the switch.cpp file, the judgment condition of R1.free, R2.free, R3.free is wrong, which causes some data packets to be lost too early. The code is modified as follows: pkt fifo::pkt_out() { pkt temp; temp = regs[0]; if (--pntr == 0) empty = true; else { regs[0] = regs[1]; regs[1] = regs[2]; regs[2] = regs[3]; full = false; } return(temp); } /////write the register values to output fifos//////////// if ((!R0.free) && (R0.val.dest0) && (!q0_out.full)) { q0_out.pkt_in(R0.val); R0.val.dest0 = false; if (!(R0.val.dest0|R0.val.dest1|R0.val.dest2|R0.val.dest3)) R0.free = true; } if ((!R1.free) && (R1.val.dest1) && (!q1_out.full)) { q1_out.pkt_in(R1.val); R1.val.dest1 = false; if (!(R1.val.dest0|R1.val.dest1|R1.val.dest2|R1.val.dest3)) R1.free = true; } if ((!R2.free) && (R2.val.dest2) && (!q2_out.full)) { q2_out.pkt_in(R2.val); R2.val.dest2 = false; if (!(R2.val.dest0|R2.val.dest1|R2.val.dest2|R2.val.dest3)) R2.free = true; } if ((!R3.free) && (R3.val.dest3) && (!q3_out.full)) { q3_out.pkt_in(R3.val); R3.val.dest3 = false; if (!(R3.val.dest0|R3.val.dest1|R3.val.dest2|R3.val.dest3)) R3.free = true; } At the same time, I also submitted the modified code on github Quote Link to comment Share on other sites More sharing options...
XYHZ Posted July 13, 2021 Author Report Share Posted July 13, 2021 The version is SystemC 2.3.3 (Includes TLM) Quote Link to comment Share on other sites More sharing options...
maehne Posted July 13, 2021 Report Share Posted July 13, 2021 Thanks for your suggestions, I reported them to the SystemC Language Working Group. Quote Link to comment Share on other sites More sharing options...
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