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Hello

I use example from http://doulos.com/knowhow/systemc/tlm2/tutorial__1/ and turn this into scheme in Figure 4 from OSCI TLM-2.0 USER MANUAL JA22: (Initiator)->(Initiator/Target)->(Initiator). Suppose that we use only TLM_WRITE_COMMAND. I add module (Initiator/Target) in existing example. In this module I implement b_transport like as in target, and implement thread_process like as in initiator. And I use shared memory for b_transport and thread_process, i.e. memcpy from b_transport and thread_process use the common address at the same time. Can I do so 3-stage pipeline? Or there is nondeterministic behaviour? This depends on TLM or SystemC mechanism?

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