mohitnegi Posted May 2, 2013 Report Posted May 2, 2013 /***************************************************************************** The following code is derived, directly or indirectly, from the SystemC source code Copyright (c) 1996-2006 by all Contributors. All Rights reserved. The contents of this file are subject to the restrictions and limitations set forth in the SystemC Open Source License Version 2.4 (the "License"); You may not use this file except in compliance with such restrictions and limitations. You may obtain instructions on how to receive a copy of the License at http://www.systemc.org/. Software distributed by Contributors under the License is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License for the specific language governing rights and limitations under the License. *****************************************************************************/ /***************************************************************************** simple_fifo.cpp -- Simple SystemC 2.0 producer/consumer example. From "An Introduction to System Level Modeling in SystemC 2.0". By Stuart Swan, Cadence Design Systems. Available at www.systemc.org Original Author: Stuart Swan, Cadence Design Systems, 2001-06-18 *****************************************************************************/ /***************************************************************************** MODIFICATION LOG - modifiers, enter your name, affiliation, date and changes you are making here. Name, Affiliation, Date: Description of Modification: *****************************************************************************/ #include <systemc.h> class write_if : virtual public sc_interface { public: virtual void write(char) = 0; virtual void reset() = 0; }; class read_if : virtual public sc_interface { public: virtual void read(char &) = 0; virtual int num_available() = 0; }; class fifo : public sc_channel, public write_if, public read_if { public: fifo(sc_module_name name) : sc_channel(name), num_elements(0), first(0) {} void write(char c) { if (num_elements == max) wait(read_event); data[(first + num_elements) % max] = c; ++ num_elements; write_event.notify(); } void read(char &c){ if (num_elements == 0) wait(write_event); c = data[first]; -- num_elements; first = (first + 1) % max; read_event.notify(); } void reset() { num_elements = first = 0; } int num_available() { return num_elements;} private: enum e { max = 10 }; char data[max]; int num_elements, first; sc_event write_event, read_event; }; class producer : public sc_module { public: sc_port<write_if> out; SC_HAS_PROCESS(producer); producer(sc_module_name name) : sc_module(name) { SC_THREAD(main); } void main() { const char *str = "Visit www.systemc.org and see what SystemC can do for you today!\n"; while (*str) {cout<<"I am in producer \n"; out->write(*str++); }} }; class consumer : public sc_module { public: sc_port<read_if> in; SC_HAS_PROCESS(consumer); consumer(sc_module_name name) : sc_module(name) { SC_THREAD(main); } void main() { char c; cout << endl << endl; while (true) { cout<<"I am in consumer \n"; in->read(c); cout << c <<"\n" << flush; if (in->num_available() == 1) cout << "<1>" << flush; if (in->num_available() == 9) cout << "<9>" << flush; } } }; class top : public sc_module { public: fifo *fifo_inst; producer *prod_inst; consumer *cons_inst; top(sc_module_name name) : sc_module(name) { fifo_inst = new fifo("Fifo1"); prod_inst = new producer("Producer1"); prod_inst->out(*fifo_inst); cons_inst = new consumer("Consumer1"); cons_inst->in(*fifo_inst); } }; int sc_main (int, char *[]) { top top1("Top1"); sc_start(); return 0; } this represent a systemC based fifo example from the LRM .... if i wish to add a stimulus to it should i do that in producer ??? Usually i have seen that systemC examples have only a systemC module , a stimulus for test generation and a top , there is no producer or consumer in ....what is the standard approach ???? Quote
David Long Posted May 2, 2013 Report Posted May 2, 2013 Communication between a producer ("initiator") and consumer ("target") is very common in SystemC models. The model above predates the 1666-2005 standard but shows quite nicely how you could create a fifo to model communication. Things in the SystemC community have moved on a bit since this model was written - most people wanting to model this sort of behaviour are more likely to be using TLM2 type communication with initiator and target sockets connected directly together, rather than having some channel in between (it is more efficient when it comes to CPU time during a simulation). Regards, Dave Quote
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