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jiachao

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  1. I have a multi-core C processor model, for each processor I use vcml:: sc_async(machineware-gmbh/Virtual Components Modeling Library) parallel simulation to execute ISS instructions to improve the performance of the simulation. about the memory accesses in ISS I used TLM socket accesses, but then TLM access have outside SC_THREAD problem so how to solve the problem that std::thread in sc_async switches to SC_THREAD for TLM accesses during accesses?
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