PrashanthP

Hi Jason. We are using xml file to generate register model from testbench standpoint. my usecase is to define the depth of the memory parameterizable. When the paramter values are contolled from Testbench and not from the parameter field called "value". If it is controlled from "value" field, every time i change the paramter value, i have to rerun the xml file for generating system verilog files(.sv files) which i don't need. When we run xml file which has memory configuration, it will create below class definition class my_mem extends uvm_mem; `uvm_object_utils(my_mem) function new (input string name ="mem_class"); super.new(name,<field Range>,<field width>,<access _policy>,coverage); // super.new(name,'h40,8,"RW",coverage); //i wanted is -> super.new(name,paramter_name*'h10,8,"RW",coverage); where paramter_name is controlled from TB ednfunction endclass I just wanted to control the field "Width" from testbench. If i can then i need not run xml file again to generate memory with other depth. I will simply control it from TB. If there is a possiblity please let me know. Thanks and Regards, Prashanth

hi Erwin, If i use paramter, and if i want to change the memory depth i need to regenerate the .sv files by running XML file. Any other alternatives ? Thanks and Regards, Prashanth

Hello. I have a use case where in i wanted to define the range of memory to be macro dependent. so that i dont have to evaluate the XML file again and again. For example , <ipxact:addressBlock> <ipxact:baseAddress>1000</ipxact:baseAddress> <ipxact:Range>`MACRO*'h10</ipxact:Range> .... .... </ipxact:addressBlock> So with this macros i need not rerun the XML for changing the field Range. is it possible to use `defines in IPXACT. Or any alternative solutions.

hi erwin, 1. What does the field 'memoryMap' means ? 2. what does the field 'addressBlock' means ? 3. does addressblock creates memory or we need to explicitly add usage field for memory creation ? 4. what is the significance of field 'volatile' for memory ? what if it is set to true(defaults to false) ?

Hello. I wanted to create a byte addressable memory in IPXACT with below code Here width tells the number of bits per location. If width is 8 then is it byte addressable ? And the total number of address locations are 2**10 (1024 locations starting from base address 0) ? and what is the difference between addressable units and addressunitbits ?

If i do not add the fields "slices" and "slice", it is throwing error saying it is expecting slices field or viewref field. So i have added slices and it got resolved. what is the purpose of slices and does it create any difference wrto backdoor access ?

Hello, I have created a memory in IPXACT using below fields. Now i need backdoor access for this memory piece. What are the fields that i need to add in addition for enabling backdoor access. Please help me in this context. thanks in advance.

Hi Erwin. Thanks for your help.

Hi Erwin. thanks for the validation. I need small info. How can i cross check whether registers with in register file is mapped properly as intended. Are there any built in methods for uvm_reg_file that i can use to check from where a register file is starting and its respective registers ? Thanks and Regards, Prashanth

Hi Erwin, I did not understand what you said in last comment. You want me to create another register file or for regfile[1] how can i proceed so that register offst addresses should be 1*0x20+0x0,1*0x20+0x4 and so on. Could you please add some snippet on same for more understanding on this. Thanks and Regards, Prashanth

Can you please check this snippet where it is written inside an addressblock. And based on dim PARAM, those many sets of registers will be created. Can you help with the offset address that i require as per the tables given in above comments. Thanks, Prashanth

Hi Erwin, Can you please help me with this. Thanks, Prashanth

Hi Erwin. Small correction. Register names as well are different wrto sets. For ex: 1st set has names with _0(Reg0_0,Reg1_0,..) extension and 2nd set has extension with _1(Reg1_1,Reg2_1..) etc Can you add the snippet for the same. It would be very helpful. Thanks, Prashanth

Hello. I have a use case wrto IPXACT where in we have a register set Let us say we have 3 register sets. Register names are same but their offset addresses are different. Is there any parameter feature in IPXACT where in if we set parameter to be 4 then we have 4 sets of registers created with their respective offset addresses as mentioned above. Request to help me on this. Thanks in Advance, Prashanth

Hi Erwin. 1. What is this field "range" used for. what is its significance ? 2. now i can simply run the built in sequences for memory of RAL to verify the RAL memory against DUT memory right ? Thanks, Prashanth