September 10-11, 2015
Bangalore, India
dvcon-india.org
DVCon India provides an excellent platform to share knowledge, experience and best practices covering Electronic System Level Design & Verification for IP and SOC, VIP development and Virtual Prototyping for Embedded Software development and debug. The conference provides multiple opportunities to interact with industry experts delivering keynote speeches, invited talks, tutorials, panel discussions, technical paper presentations, poster sessions and exhibits from ecosystem partners. The conference has two parallel tracks:
ESL Track: SystemC related topics such as Pre-Si SW development and debug using virtual prototypes of electronic systems and SoCs, architectural exploration, power and performance analysis for use cases, high level synthesis, model interoperable standards and more.
DV Track: Design & Verification languages, methodologies based on SystemVerilog, Verilog, UVM and technologies such as Formal Verification, Hardware Acceleration, Emulation and prototyping, along with the most widely used simulation and more.
Call for papers now open >
Call for tutorials now open >
Event details
