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    04 March 2014 01:30 AM

    Monday, March 3, 2014
    5:30pm to 7:30pm
    Oak Ballroom
    DoubleTree Hotel, San Jose CA
    In 2012, the Accellera Board tasked representatives from six electronics companies to define a standard for multi-language verification interoperability. Please join Warren Stapleton, Chair of the Multi-Language Working Group (MLWG), as he introduces the group, reviews its charter, and explains the progress of the group in an open forum. This will be followed by a more detailed working session for anyone interested. Join us to learn more about this exciting topic.
    The audience for this session is IP stakeholders -- the authors, users, and EDA tool vendors active, or wanting to become active, in the standardization of languages or methodologies based on or using SystemVerilog, UVM, and/or SystemC. The intent is to provide enough detail for a high-level overview on the multi-language verification concepts and requirements in the context of standardization.
    The agenda for this birds-of-a-feather meeting is as follows:
    Introduction to the MLWG (20 min)Charter, goals, requirements, current status

    [*]Proposed architecture and intended use cases (40 min)
    Discuss a specific use case in more detail to get feedback and ideas
    Touch upon open issues that remain ahead of the MLWG to solve

    [*]Break (5 min)
    [*]Roadmap including milestones
    LRM structure/content
    Standard development process and how to contribute
    MLWG Working Session (50 min)



    No registration required.

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