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more than 1 TLM ports in a module


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Hi,

 

Sorry if this has been asked before. I have problem to get sc_module to compile with 2 tlm_blocking_put_if's but with different template types.

I have the sc_module inherit tlm_blocking_put_if's like this:

 

class Abc: sc_module, tlm_blocking_put_if<X>, tlm_blocking_put_if<Y> {

 

......

 

  sc_export<tlm_blocking_put_if<X> > port1;

  sc_export<tlm_blocking_put_if<Y> > port2;

 

.....

 

  virtual void put(const X &t) { ....}

  virtual void put(const Y &t) { ....}

.....

 

}

 

Do you see anything wrong? Do I need to use tlm_tag?

 

Thanks,

Sam

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