sprl111

My mistake. That is the issue. Thank you.

I did share the exact error. It is a cut and paste. And probably you're wrong.

Hello, I'm trying to build a simple synthesizable state machine in SystemC and trying to compile it to System Verilog with the Intel Compiler for SystemC. I'm getting this linking error, ib64/libsystemcd.so.3.0.0_pub_rev_20231124: undefined reference to `sc_main'. I installed the compiler on RHEL 8.9 and during the lengthy (hours) installation were were a few warnings. Does anyone have any idea on how I might track this down? The three key files (source & CMake list) are attached. Thanks. afrmain.cpp AllForRyan.h CMakeLists.txt

Yep, you're correct. It was my fault. Thanks.

Thank you.

Hello, I downloaded the Core SystemC Language and Examples (tar.gz) file into my RHEL 8 Linux VM and successfully installed the buildDebug part. While attempting to install the buildRelease part the install failed. I discovered that unlike in the case of the debug build, the buildRelease folder is empty. So, how do I install the buildRelease part of the library? Thanks.

After endless frustration with the AMD Vitis (Unified? HLS?. even that is confusing) together with no AMD support, I'm looking at other alternatives for complex system architecture, design and simulation. I've done a lot of FPGA HDL (VHDL and some Verilog) work over the past decade but some things just become intractable on an HDL level. I'm comfortable with C++ and I'm reading Black, Donovan, et al. So, it seems that SystemC is capable of the very abstract high level down to cycle/clock accurate logic. So, what tools do people use for SystemC? Simulation seems pretty straight forward as it seems that just about any C++ compiler will work but what about synthesis targeting AMD or Intel FPGAs? Thanks.