Matchlib Examples Kit for Accellera SystemC Evolution Day 2020 Presentation 5.0.0

Matchlib: A New Open-source Library to Enable Efficient Use of High Level Synthesis

Stuart Swan

Platform Architect

Mentor, A Siemens Business

stuart_swan@mentor.com

Note: This download is now obsolete. The updated download can be accessed here:

https://forums.accellera.org/files/file/127-matchlib-examples-kit-for-accellera-synthesis-working-group/

Matchlib is a new open-source SystemC library developed by NVidia Research to enable digital hardware to be accurately and efficiently designed and verified at a high level of abstraction, leveraging commercial high level synthesis tools. Some of the key goals of Matchlib are to provide a highly configurable library of HW components that can be directly synthesized to HW with very high quality of results, and to enable very accurate performance simulation of these models in SystemC prior to synthesis, so that the overall design and verification effort is much more efficient.  Matchlib contains models for commonly-used HW components such as AXI bus fabric components (routers, arbiters, etc), network on chip components, banked memories, crossbars, etc.

Matchlib is being actively used by hardware design teams in both industry and academia for advanced hardware design projects, and multiple tapeouts from different groups have occured for chips that have been almost entirely designed with Matchlib.

A video from NVidia Research on Matchlib is here:

https://www.youtube.com/watch?v=n8_G-CaSSPU

This kit contains a representative set of Matchlib examples presented at Accellera SystemC Evolution Day 2020 and fully self-contained source files and scripts so that the examples can be built and run on any linux compatible system with no other required software. All contents of the kit are open source.