The IEEE-SA Symposium on Electronic Design Automation (EDA) and Intellectual Property (IP) Interoperability is intended to help members of the electronics/semiconductor design and verification community better understand the landscape of EDA and semiconductor intellectual property (IP) standards, as well as the role of these standards to address industry interoperability challenges.
The 2015 IEEE-SA Symposium on Electronic Design Automation (EDA) and Intellectual Property (IP) Interoperability will be held at:
Cadence Design Systems, Inc., Building 10
2655 Seely Avenue, San Jose, CA 95134
Registration for this event is free.
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