DVCon India
September 25-26
Bangalore, India
www.dvcon-india.org
The Design and Verification Conference & Exhibition India is the most anticipated, premier technical event bringing together all the stakeholders involved in design and verification of IP, SoC, ASIC, FPGA and system level solutions. DVCon has been hosted in the Silicon Valley for over two decades with participation from the electronics and semiconductor industry. To enable active participation from the engineering community across the globe, Accellera Systems Initiative (Accellera) extends its sponsorship by bringing DVCon to India and Europe this year.
The 2-day conference in Bangalore provides an excellent platform to share knowledge, experience and best practices covering Electronic System Level Design & Verification for IP and SOC, VIP development and Virtual Prototyping for Embedded Software development and debug. The conference provides multiple opportunities to interact with industry experts delivering keynote speeches, invited talks, tutorials, panel discussions, technical paper presentations, poster sessions and exhibits from ecosystem partners. The attendees will also get the latest information on various Accellera standards for system design, modelling and verification. These standards include UVM, SystemC (and its variants like SystemC-AMS, SCV, CCI, Synthesis subset), SystemVerilog, PSL, Assertions for AMS, Verilog, IP-XACT, OCP and many more.
Find out more at www.dvcon-india.org.
Event details
