primitive port that responds to sensitivity ???

[JorgeAbarca]

Hi!

 

I am new on this, and i am learning systemC. i am working on an academic project, then i wonder if it is possible (after some systemC code modifications) to generate primitive_ports that respond to a sensitivity list? then I could generate a function that set to 0 each port when a global signal is set to a specific state. is it possible? what parts of systemC code i'd need to modify? 

thanks a lot in advance for the help and guidance!

[maehne]

Before implementing your own ports and attempting to modify the SystemC code, you should first get familiar with the basic concepts and capabilities of SystemC. I suggest that you read a good introductory text to SystemC, e.g., "SystemC from the Ground Up" by David Black et al.

That said, your requirement description seems to indicate that you could achieve the wanted functionality by using simply the standard SystemC ports and signals: One instance of sc_core::sc_out<T> in some module, which drives the global signal of type sc_core::sc_signal<T> that is bound to it during elaboration. And n port instances of sc_core::sc_in<T> bound to the same signal. You can then make some SC_METHOD or SC_THREAD in the module which instantiates one or several of this in ports to be sensitive to changes on this/these ports.

[JorgeAbarca]

let me explain better, what I need is to represent power domains in SystemC for functional verification, reading the UPF file. The idea is to make the implementation hidden for the user, then it would be automatic and transparent for the user.  That said, i thought that i could modify the sc_out class using inheritance, to be aware about the domain to which  belongs, but then i need to turn off the signal if the domain is off. to do that, i thought that i would need to create a sc_out with sensitivity, then it automatically could monitor the status of the domain, and if the status in OFF, it automatically could be set to 0. I'd say that it is possible, but i'd like to know the opinion of expert people like you. what parts would I have to modify? thanks!

[Roman Popov]

Yes, you can design ports that will behave the way you described. 

Together with special ports I suggest you to also create a special kind of module that will encapsulate power control events. Then you can make power aware ports to be automatically sensitive to power events of module they belong to.