Grigoriy

Hello I use example from http://doulos.com/knowhow/systemc/tlm2/tutorial__1/ and turn this into scheme in Figure 4 from OSCI TLM-2.0 USER MANUAL JA22: (Initiator)->(Initiator/Target)->(Initiator). Suppose that we use only TLM_WRITE_COMMAND. I add module (Initiator/Target) in existing example. In this module I implement b_transport like as in target, and implement thread_process like as in initiator. And I use shared memory for b_transport and thread_process, i.e. memcpy from b_transport and thread_process use the common address at the same time. Can I do so 3-stage pipeline? Or there is nondeterministic behaviour? This depends on TLM or SystemC mechanism?

1. Do I get it right - if I describe the functional behavior and synchronize the input & output data of each block, I'll get a model of AT type? Please specify if I'm using the AT term correctly. 2. If the model is just pipeline (doesn't contain FSM), how should I use sc_threads? I'm not really sure, since these methods usually simulate software threads. If I'm still deciding on using threads for describing the hardware, should I be using fifo for sync?

Hello I do JPEG encoder on SystemC. This model should give data from every part of JPEG (DCT and other) at appropriate cycle. Like RTL but without inside structure of every blocks. 1. Will be this model cycle-accurate or loosely-timed or may be other? 2. Need I use SC_THREAD for these purpose or using SC_METHOD will be enough? Thank