SystemVerilog OOPs help

[dvengineer15]

OOP in SystemVerilog. Can someone explain how to do this.

class employee;

   string name;

   int employee_id;

endclass

class manager extends employee;

    employee reports]$];

endclass

// Includes both employee and managers in a company

employee list[$];

 

Q: From the list above, how do you distinguish managers from employees?