enriqueflorido37 Posted August 24 Report Share Posted August 24 Good First of all, my name is Enrique and I am new to the forum, I am an engineering student and I am doing my final degree project. I have a VHDL file to which I have to do a UVM verification, I am doing it through the systemverilog-VHDL assistant program. Once I have my agent, monitor, sequencer, etc... I compile my modules without any problems. The problem comes when launching the simulation to questasim that seems not to be able to load the test correctly, in my case it is called spike_test and the factory but its declarate: . . class spike_test extends uvm_test; `uvm_component_utils(spike_test) . . I would greatly appreciate any kind of help. Thanks a lot questa messenger # # UVM_INFO verilog_src/questa_uvm_pkg-1.2/src/questa_uvm_pkg.sv(277) @ 0: reporter [Questa UVM] QUESTA_UVM-1.2.3 # UVM_INFO verilog_src/questa_uvm_pkg-1.2/src/questa_uvm_pkg.sv(278) @ 0: reporter [Questa UVM] questa_uvm::init(+certe) # ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). # Time: 0 ns Iteration: 0 Instance: /tb_spike_int_n_gen_bw/dut # ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). # Time: 0 ns Iteration: 0 Instance: /tb_spike_int_n_gen_bw/dut # ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). # Time: 0 ns Iteration: 0 Instance: /tb_spike_int_n_gen_bw/dut # ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). # Time: 0 ns Iteration: 0 Instance: /tb_spike_int_n_gen_bw/dut # UVM_WARNING @ 0: reporter [BDTYP] Cannot create a component of type 'spike_test' because it is not registered with the factory. # UVM_FATAL @ 0: reporter [INVTST] Requested test from command line +UVM_TESTNAME=spike_test not found. # # --- UVM Report Summary --- # # ** Report counts by severity # UVM_INFO : 0 # UVM_WARNING : 1 # UVM_ERROR : 0 # UVM_FATAL : 1 # ** Report counts by id # [BDTYP] 1 # [INVTST] 1 # ** Note: $finish : ./../../UVM_1.1d/base/uvm_report_object.svh(292) # Time: 0 ns Iteration: 0 Instance: /tb_spike_int_n_gen_bw # 1 # Break in Function uvm_pkg/uvm_report_object::die at ./../../UVM_1.1d/base/uvm_report_object.svh line 292 Quote Link to comment Share on other sites More sharing options...
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