Error: (E112) get interface failed: port is not bound: port 'Target1.int_o' (sc_out)

[Ming]

I have a port defined as 'sc_out<sc_int<1> > outa' in module A, a port defined as 'sc_in<sc_int<1> > inb' in module B, then a channel defined as 'sc_signal<sc_int<1> > sig' in sc_main, then in sc_main 'A.outa(sig); B.inb(sig);'.

Then I got an error message attached below.

Error: (E112) get interface failed: port is not bound: port 'Target1.int_o' (sc_out)
In file: ../../../src/sysc/communication/sc_port.cpp:235

Could you please help? Thanks.

[David Black]

Show your code please. Better: get a free account on EDAplayground.com and share your code from there. 

[Ming]

Thanks for your quick response. Related code is attached below. Could you please help take a look?

(I'm building a simple SoC, all codes will be messy, so just list related codes here)

 

module A:

struct uart: sc_module
{
  sc_out<sc_int<1> > int_o;
...

module B:

SC_MODULE(tb) {
        
  sc_out<sc_int<6> > int_o;
  sc_in<sc_int<1> > int_timer_i;
  sc_in<sc_int<1> > int_uart_i;
        
  void gen() {
    int_o.write(((int_timer_i.read()) & 0x1) | ((int_uart_i.read() & 0x1)<<1));
  }   
        
  SC_CTOR(tb) {
    SC_METHOD(gen)
    sensitive << int_timer_i << int_uart_i;                                                                                                                                                                         
    dont_initialize();
  }   
        
};   

sc_main:

int sc_main(int argc, char ** argv) {
   
  sc_signal<sc_int<6> > int_vector;
  sc_signal<sc_int<1> > int_timer;
  sc_signal<sc_int<1> > int_uart;
  sc_signal<sc_int<1> > int_uart_pc;
   
  uart        * target1_uart;  
  tb          * testbench;
  
  target1_uart = new uart       ("Target1");
  testbench    = new tb         ("testbench");
   
  target1_uart->int_o(int_uart);
   
  testbench->int_o(int_vector);
  testbench->int_timer_i(int_timer);
  testbench->int_uart_i(int_uart);                                            

 

Regards,

Ming

[Eyck]

I took your eample and pasted it at https://www.edaplayground.com/x/EtqQ

From there is works without any hassle.

You seem to have anything different in your code base than posted here.

[Ming]

Oh Thanks.

I found my issue. I initialized the sc_out port in the constructor of module A.

 SC_CTOR(uart): int_o("int_o")
  {
    int_o = 0;  
...

After removing that line, the model run successfully.

I notice while we initialize sc_out in SC_CTOR, the sc_out port is actually not bound. So we can't initialize port in constructor.

 

Thanks again. Regards,

Ming

 

[maehne]

If you want to set the initial value of the signal to which the port int_o will be bound during elaboration, you can use the member function initialize() (cf. to clause 6.10.4 of IEEE Std 1666-2011).

[Ming]

Yes, member function initialize() works.

SC_CTOR(uart): int_o("int_o")
  {
    int_o.initialize(0);
...

Thanks. Regards,

Ming

[David Black]

You can also use start_of_simulation, which is a more uniform approach (i.e., the concept works across all types of channels):

SC_MODULE(tb) {
  //...
  void start_of_simulation() {
    int_o->write(0);
  }
  //...
};

 

[Ming]

Hi David,

Oh sorry. I may miss your reply here.

 

Thanks. Regards,

Ming