Free UVM Register Specification generator

[anupam1363912822 0]

Hi all,

The UVM register specification is not released yet. But whenever it is, we will provide the generator at no extra cost, provided you have already purchased OVM or VMM or IP-XACT generators.

IDesignSpec (IDS) can take your Word or OpenOffice documents and convert them into code for registers and memory maps. You can get one of the 10 possible generators, or use Tcl to create your own customized outputs. It can read in IP-XACT, SystemRDL as well in batch or interactive modes.

Visit http://agnisys.com to request a download.

Thanks,

Anupam

Edited December 9, 2010 by anupam
typo

[davidmurray 0]

As all of our Socrates generators are free, Duolog will also be providing a UVM generator immediately after UVM register package release. See Socrates Bitwise for more details.

David Murray

Duolog Technologies

http://www.duolog.com

DAC-2020 : Booth 568

[anupam1363912822 0]

IDesignSpec can now generate UVM registers.

So now you can generate UVM, OVM, VMM, IP-XACT, Verilog & VHDL etc. based registers directly from your own Excel files or Word documents.

The Excel plugin is new. It enables you to keep your existing Excel spreadsheet formats and generate code directly from them. We created it because people didn't want to enter the register data again or change their formats.

Check out the latest Demo video.

To quickly try these simple plug-ins, please submit this evaluation form.

[anupam1363912822 0]

Visit this link to see more details and get your copy of a free MS Excel to UVM 1.0 Register Generator.

New features are :

Coverage knobs (to turn coverage on/off for individual fields/registers/files/blocks),

Custom code (so that appropriate code gets generated),

User defined properties (for custom behavior), etc.

New outputs :

vr_ad (for Specman 'e' users),

SVG (for graphical representations of register maps).