Jump to content

Search the Community

Showing results for tags 'vcd'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM (IEEE 1800.2) - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
  • Portable Stimulus
    • Portable Stimulus Discussion
    • Portable Stimulus 2.0 Public Review Feedback
  • IP Security
    • IP Security Assurance Whitepaper Discussion
  • IP-XACT
    • IP-XACT Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Calendars

  • Community Calendar

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests


Biography


Location


Interests


Occupation


Company

Found 8 results

  1. Hey everyone, I am trying to trace out the wave for the input and the output. I have tried for different ways,but not getting the desired results. One of the way was,i created 2 same signals with diff. name in testbench file and tried to trace ,but i was not successful in doing so. Any suggestions to do? Thank you. ? Ps:- I have attached the code through which m trying to trace.Plz,help me out with this.I have modified the code according to the errors,So thats the reason for using namespace sc::core while declaring fifo tracing input. /////////
  2. Dear users, I'd like to compare the vcd output of differnt versions of our prototype. Is there some kind of vcd diff available ? Graphically ? Regards, Jean
  3. Hi, I'm new to SystemC, but have worked with Verilator/C++ for quite a while. We are now moving to Verilator/SystemC and have problems creating hierarchical vcd dumps from SystemC native vcd generation. The only hint i got from the documentation is to use dots to separate hierarchical levels, but it does not create a hierarchy in the vcd files. I attached two screen dumps from gtkwave. The first one is a vcd generated from Verilator, the second is a vcd generated from SystemC. Any suggestions are most welcome. Regards, Mike
  4. Hi to everybody, I am new to the SystemC world and I have some difficulties. I am trying to create a vcd file where I can see all my signals. The program compiles without any errors however the vcd file is not created in the project folder or anywhere else. Any ideas? Thank you in advance.
  5. Hi, I am getting errors like below: Trace ERROR: No traces can be added once simulation has started. To add traces, create a new vcd trace file. Code of memory.cpp corresponding to error: Memory::Memory(sc_core::sc_module_name name, unsigned int size) : sc_module(name), m_size(size) { tf = sc_core::sc_create_vcd_trace_file("trace_data1"); // tracing, trace file creation tf->set_time_unit(10, sc_core::SC_US); storage = new ensitlm::data_t[size/sizeof(ensitlm::data_t)]; } // Destructor Memory::~Memory() { // close trace file sc_close_vcd_trace_file(tf); delete []
  6. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
  7. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
  8. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
×
×
  • Create New...