Hi Folks,
Interestingly today making some tweaks I faced a scenario with overrides.
Suppose I add some variables in the extended class which are not present in the base class.
Then I called the uvm_set_type_override from my top test.
Interestingly I wanted to access those newly added variables in final_phase of some component , but during the simulator compile/elaboration phase it fails since the overrides are active during Simulation run-UVM_BUILD_PHASE.
So my question is , if someone using some legacy code and wanted to update the stuff without re-writing again/or m