Jump to content

Search the Community

Showing results for tags 'uvm_env'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV, CRAVE, FC4SC)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM (IEEE 1800.2) - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
  • Portable Stimulus
    • Portable Stimulus Discussion
    • Portable Stimulus 2.0 Public Review Feedback
  • IP Security
    • SA-EDI Standard Discussion
    • IP Security Assurance Whitepaper Discussion
  • IP-XACT
    • IP-XACT Discussion
  • SystemRDL
    • SystemRDL Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests


Biography


Location


Interests


Occupation


Company

Found 2 results

  1. Hello, I want to develop an unified verification environment for some bridges, so i started by fixing the structure that i want to make : 1) I will have one generic scoreboard, env_top, test, and tb_top 2) The agents of this bridges will be connected in the first time with FIFO, and FIFO will be connected to Scoreboard 3) For having the Coverage, can I have the coverage on the connection between FIFO and Scoreboard ? I want to know if this is right structure to follow ? else i will be gratful to receive other propositions. Thanks,
  2. Hi, Following is the sample code class a_env extends uvm_env .... endclass class basic_test extends uvm_test a_env a_env1; a_env1 = a_env::type_id:create("a_env", this); endclass class b_env extends uvm_env a_env a_env2; // only reference ... endclass class my_test extends basic_test b_env b_env1; virtual function void connect_phase( umv_phase phase) super.connect_phase(phase); b_env1.a_env2 = a_env1; endfunction .. endclass I am getting NULL_OBJCT access error with the above code.. can anyone helpout? Thanks, Satya
×
×
  • Create New...