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Hi, I am trying to port my uvm code from UVM 1.1d to UVM-IEEE. Having the following line in my code: `uvm_field_queue_object(p_ext_agents, UVM_ALL_ON | UVM_REFERENCE) where uvm_component p_ext_agents[$]; cause the following compile error: `uvm_field_queue_object(p_ext_agents, UVM_ALL_ON | UVM_REFERENCE) | xmvlog: *E,DBITNS (sia/lib/sv/cdn_iwb/sv/cdn_iwb_routing_model.sv,172|98): The argument of the system function call was not of bit-stream type. Investigating the reason of this error, seems like the error comes from the following code inside the above macro: `define uvm_compare_named_int(NAME, LVALUE, RVALUE, RADIX, COMPARER=comparer) \ `m_uvm_compare_begin(LVALUE, RVALUE, COMPARER) \ if ($bits(LVALUE) <= 64) \ void'(COMPARER.compare_field_int(NAME , LVALUE, RVALUE, $bits(LVALUE), RADIX)); \ else \ void'(COMPARER.compare_field(NAME , LVALUE, RVALUE, $bits(LVALUE), RADIX)); \ `m_uvm_compare_end the problematic line is: if ($bits(LVALUE) <= 64) Indeed, queue of uvm_component is not of bit-stream type. Any advice here? Thanks, Yacov

=== Posted same query over here, but unfortunately got no response so far. Henceforth trying it out in latest forum === When jumping form run phase to extract phase, the UVM BCL somehow invokes the extract phase twice. But when jumping from run phase to final phase, the final phase is invoked once only. Here I am using uvm_domain to jump from one phase to another. In the following pseudo code, the jump does not happen for extract phase. Moreover the extract phase display is coming twice. While the jump happens gracefully when jumping to final phase. package pkg; import uvm_pkg::*; class env extends uvm_env; `uvm_component_utils(env) int m_delay; function new (string name, uvm_component parent); super.new(name, parent); endfunction function void build_phase(uvm_phase phase); if (!uvm_config_db#(int)::get(this, "", "delay", m_delay)) `uvm_fatal("", "Delay missing from config db") endfunction task run_phase(uvm_phase phase); `uvm_info(get_full_name(), "run_phase called", UVM_MEDIUM) phase.raise_objection(this); repeat(5) #(m_delay); phase.drop_objection(this); `uvm_info(get_full_name(), "run_phase returning", UVM_HIGH) endtask function void extract_phase(uvm_phase phase); `uvm_info(get_full_name(),"this is extract phase",UVM_LOW) endfunction function void check_phase(uvm_phase phase); `uvm_info(get_full_name(),"this is check phase",UVM_LOW) endfunction function void report_phase(uvm_phase phase); `uvm_info(get_full_name(),"this is report phase",UVM_LOW) endfunction function void final_phase(uvm_phase phase); `uvm_info(get_full_name(),"this is final phase",UVM_LOW) endfunction endclass class test extends uvm_test; `uvm_component_utils(test) function new (string name, uvm_component parent); super.new(name, parent); endfunction env m_env1; uvm_domain domain1; function void build_phase(uvm_phase phase); // Use different delays to see that domain1 and domain2 run independently uvm_config_db#(int)::set(this, "m_env1", "delay", 100); m_env1 = env::type_id::create("m_env1", this); domain1 = new("domain1"); m_env1.set_domain(domain1); endfunction task run_phase(uvm_phase phase); phase.raise_objection(this); #5; // this is for domain1 to jump to respective phase phase if(!$test$plusargs("JMP_FINAL_PH")) begin `uvm_info(get_type_name(),"Jumping to extract phase now...",UVM_LOW) domain1.jump(uvm_extract_phase::get()); // This calls extract phase twice!! //phase.jump(uvm_extract_phase::get()); // This calls extract phase once only end else begin `uvm_info(get_type_name(),"Jumping to final phase now...",UVM_LOW) domain1.jump(uvm_final_phase::get()); // This calls final phase once. Under any circumstance end phase.drop_objection(this); endtask endclass endpackage module top; import uvm_pkg::*; import pkg::*; initial run_test("test"); endmodule Output is as follows: // Jumping from run_phase to extract_phase: UVM_INFO @ 0: reporter [RNTST] Running test test... UVM_INFO phase_jump.sv(20) @ 0: uvm_test_top.m_env1 [uvm_test_top.m_env1] run_phase called UVM_INFO phase_jump.sv(66) @ 5: uvm_test_top [test] Jumping to extract phase now... UVM_INFO 1800.2-2017-0.9/src/base/uvm_phase.svh(1579) @ 5: reporter [PH_JUMP] phase post_shutdown (schedule uvm_sched, domain domain1) is jumping to phase extract UVM_INFO phase_jump.sv(28) @ 500: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is extract phase UVM_INFO phase_jump.sv(28) @ 500: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is extract phase UVM_INFO phase_jump.sv(31) @ 500: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is check phase UVM_INFO phase_jump.sv(34) @ 500: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is report phase UVM_INFO phase_jump.sv(37) @ 500: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is final phase UVM_INFO 1800.2-2017-0.9/src/base/uvm_report_server.svh(802) @ 500: reporter [UVM/REPORT/SERVER] // Jumping from run_phase to final_phase: UVM_INFO @ 0: reporter [RNTST] Running test test... UVM_INFO phase_jump.sv(20) @ 0: uvm_test_top.m_env1 [uvm_test_top.m_env1] run_phase called UVM_INFO phase_jump.sv(71) @ 5: uvm_test_top [test] Jumping to final phase now... UVM_INFO 1800.2-2017-0.9/src/base/uvm_phase.svh(1579) @ 5: reporter [PH_JUMP] phase post_shutdown (schedule uvm_sched, domain domain1) is jumping to phase final UVM_INFO phase_jump.sv(37) @ 5: uvm_test_top.m_env1 [uvm_test_top.m_env1] this is final phase UVM_INFO 1800.2-2017-0.9/src/base/uvm_report_server.svh(802) @ 5: reporter [UVM/REPORT/SERVER] Can anyone let me know what am I missing anything over here?