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Showing results for tags 'transaction'.
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Hello all, Today, I ended up in a situation where the transaction boxes in Cadence Simvision will not at the exact time where they were supposed to be. This resulted in a drift of the boxes represented in the waves. On looking closer, the box begin time happened only at 1ns resolution, whereas my agent package's resolution and even the default simulation timescale was 1ns/1ps. So I expected the boxes' begin times to be possible at 1ps resolution (not 1ns). Here are the prints from the uvm_info debug statements in my agent monitor: UVM_INFO @2832.523ns
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Hi everyone, For a processor model, I need to be able to reset or kill a transaction sent across an interface and stored in a Payload Event Queue. How can I do that? If I initiate a transaction like this : tlm::tlm_generic_payload* trans = new tlm::tlm_generic_payload; tlm::tlm_phase* trans_phase = new tlm::tlm_phase; sc_time* delay = new sc_time; tlm::tlm_sync_enum* transStatus = new tlm::tlm_sync_enum; *trans_phase = tlm::BEGIN_REQ; *delay = SC_ZERO_TIME; // Or any delay trans->set_command(tlm::TLM_WRITE_COMMAND); trans->set_dmi_allowed(false); trans->set_response_status(tlm
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transaction counter from waveform file
alfonsoamarco posted a topic in UVM Simulator Specific Issues
Hi All, I am wondering whether there is an add-on tool or post-processing script to count the occurences of a specific transaction form an existing waveform file, something like all reads from this address range or all the burst from a specific peripheral. Thanks in advance for your help. Cheers, Alfonso-
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- waveform
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We are using TLM to pass transactions from SystemVerilog to SystemC. I have two cases where I am stuck. Actually, it is the same case, but I have two angles to my question. 1) Is it possible to still use a TLM setup, but without a transaction type. (I realize that this is contradictory to the acronym.) A c-model has a debug function which takes no input arguments. So, when the SV testbench runs into a problem, it can call this function in the SystemC/c-model. As all of our connections now are sc_port/sc_export, with TLM, I'd like to stick with that flow if possible, rather than addin
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- tlm
- uvm_blocking_put_port
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