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Found 1 result

  1. I am trying to recreate/understand a testbench problem I currently have by creating a small example. In creating that small example, I am running into a problem. Below, in the "try1" and "try2" lines, I am attempting to override apple with orange. Can anyone tell me what I am doing incorrectly? package my_pkg; import uvm_pkg::*; `include "uvm_macros.svh" class orange extends uvm_component; `uvm_component_utils(orange) function new(string name, uvm_component parent); super.new(name,parent); endfunction : new task run_phase (uvm_phase phase); `uvm_info("UVC","run_phase: Executing. Orange <<<<<<<<<<<<<",UVM_LOW) endtask : run_phase endclass : orange class apple extends uvm_component; `uvm_component_utils(apple) function new(string name, uvm_component parent); super.new(name,parent); endfunction : new task run_phase (uvm_phase phase); `uvm_info("UVC","run_phase: Executing. Apple run_phase<<<<<<<<<<",UVM_LOW) endtask : run_phase endclass : apple class my_testbench extends uvm_component; apple my_uvc; `uvm_component_utils(my_testbench) function new(string name, uvm_component parent); super.new(name, parent); endfunction : new function void build_phase(uvm_phase phase); super.build_phase(phase); //try1 apple::type_id::set_type_override(orange::get_type()); my_uvc=apple::type_id::create("my_uvc",this); endfunction : build_phase task run_phase (uvm_phase phase); `uvm_info("TESTBENCH","run_phase: Executing. Testbench run_phase<<<<<<<<<<<",UVM_LOW) endtask : run_phase endclass : my_testbench endpackage : my_pkg module top; import uvm_pkg::*; `include "uvm_macros.svh" import my_pkg::*; my_testbench testbench; initial begin //try2 apple::type_id::set_type_override(orange::get_type()); $display("******Start of Sim w/ the kids*******************"); testbench = my_testbench::type_id::create("testbench",null); run_test(); end endmodule : top Running with Cadence irun 13.1, I get the following error when I try "try1". UVM_FATAL @ 0: reporter [FCTTYP] Factory did not return a component of type 'apple'. A component of type 'orange' was returned instead. Name=my_uvc Parent=my_testbench contxt=testbench irun -sv top.sv -uvm
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