Jump to content

Search the Community

Showing results for tags 'sequence_item'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV, CRAVE, FC4SC)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM (IEEE 1800.2) - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
  • Portable Stimulus
    • Portable Stimulus Discussion
    • Portable Stimulus 2.0 Public Review Feedback
  • IP Security
    • SA-EDI Standard Discussion
    • IP Security Assurance Whitepaper Discussion
  • IP-XACT
    • IP-XACT Discussion
  • SystemRDL
    • SystemRDL Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Calendars

  • Community Calendar

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests


Biography


Location


Interests


Occupation


Company

Found 1 result

  1. Hi All, I have a typical use case, where the sequence item w.r.t driver is always the same, but it's view needs to change while writing constraints. The fields of sequence items to write constraints change w.r.t the header type, there are around 25-30 types of headers. What is the best way to create the base sequence item in this case in line with UVM methodology? Example:- bit [32] header; //Actual header as seen by driver The format of the header is however dynamic:- format-1 : bit[31:21] header_type; bit[20:10] field_2_type_1; bit[9:0] field_3_type_1; format-2: bit[31:21] header_type; bit[20:15] field_2_type_2; bit[14:8] field_3_type_2; bit[7:0] field_4_type_2; format-3: bit[31:21] header_type; bit[20:12] field_2_type_3; bit[11:6] field_3_type_3; bit[5:0] field_4_type_3; ....... ...... I currently have though of a packed union of different structures to be one of the solutions for this type of scenario. This union will be a member of the sequence_item class and the structure will be representation of the different formats of header. Is there a better means of creating polymorphic sequence items in UVM. I am ok to try some system verilog hacks in uvm too for a solution.
×
×
  • Create New...