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Showing results for tags 'scoreboard'.
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Alternate Scoreboarding approach
svuvmuser posted a topic in UVM SystemVerilog DiscussionsHi, The purpose of this discussion is to understand different possibilities by which the simulation performance, memory usage can be increased. Scoreboard as we understand needs the data/packets/frames etc to be stored/buffered to do a comparison with the actual data out. This works out fine when we have small sized array ranging from few bytes to few thousands of bytes.. However imagine, if we have 100 thousands of bytes and above and there is a need to store them and lets say multiple of such lanes/flows , then this would take a hit on the simulation performance. And this gets worse if we have to reuse and port it to a subsytem/chip level simulations.. With this as the background, i am looking at alternate approach for scoreboards.. In a way is possible avoid scoreboard and check the data as it comes without the need to store the expected/input data. Approach that can be thought of : 1. Generating incremental data pattern and check at the output .. (Comes again with issues like aliasing etc.. and hence need to have longer patterns.) 2. Generation of PRBS stream as the payload of the frame.. and then have a PRBS checker at the output.. and see it remains locked.. (Debug would get worse with this.. if there is a mismatch) 3. Having a byte scoreboard.. something like that.. (Not sure how feasible this is). There are many challenges even with these approach.. I am just wondering if someone has already experienced such cases and what kind of challenges are thrown out.. Appreciate any input on this. Regards, svuvmuser !
Hi, I have a interface monitor where i am capturing data from the interface. I need to pass valid data captured from the interface to the scoreboard for comparison. But the behaviour of interface signals and the way they are asserted depends on the register configuration. Now this config info is not known to the interface or the interface monitor. So while implementing the monitor, should i define two monitors 1) interface monitor which just samples all the data from the bus. 2) process data got in 1) furthur depending on the register config & then pass it on the scoreboard for comparison. Also should this be done using analysis ports? I think this is the right way but wanted to know if there is anything that UVM recommends in such cases. Thanks in advance. Parag
Below I define a uvm_scoreboard. Why will this not compile when I remove the (3) lines THIS AND THAT? Should it? `uvm_analysis_imp_decl(_rcvd_pkt) //THIS class dpx_rr_scoreboard extends uvm_scoreboard; `uvm_component_utils(dpx_rr_scoreboard) virtual function void write_rcvd_pkt(input some_trans t); //AND THAT endfunction : write_rcvd_pkt //AND THAT endclass : dpx_rr_scoreboard I am using irun 12.X and get the following error when I remove the aforementioned lines: class dpx_rr_scoreboard extends uvm_scoreboard; | ncvlog: *E,FAABP1 (/user/posedgeclk/tb/dpx_rr_scoreboard.svh,25|46): task, function, or assertion instance does not specify all required formal arguments [10.2.2][10\ .3(IEEE)]. I poked around in the uvm class library just a bit, but did not figure this out. Any ideas? Is this a uvm thing or Cadence thing (trying to enforce that I write sensible code) or just fooling thing on my part? I am asking Cadence directly as well, but wanted to throw this out to the crowd. **I am just trying to get a shell of a scoreboard compiling, and don't care that it doesn't do anything yet. Let's ignore the fact that I don't have uvm_analysis_imp_rcvd_pkt created.
Help on uvm_pw_scoreboard package.
shreya posted a topic in UVM SystemVerilog DiscussionsI am using uvm_pw_scoreboard package available on accelera Contributions.I have following queries about it . 1. Why does this package uses uvm_analysis_export and analysis_fifo implementation instead of uvm_analysis_imp in pw_checker_predictor as well as pw_scoreboard. 2. I want to pass unique id to each transaction, to do this i have implemented as below: my_local_predictor.sv file(not extended from pw_checker_predictor) uvm_analysis_port #(item) predict_port; predict_port = new ("predict_port",this); item.set_transaction_item(unique_id); $display("Predictor unique_id =%d",unique_id); predict_port.write(item) In extended pw_scoreboard function int get_stream_id(uvm_transaction t ) $display("Scoreboard unique_id =%d",t.get_transaction()); get_stream_id = t.get_transaction_id(); endfunction Output: Predictor unique_id = 2; Scoreboard unique_id= -1; Any help is appreciated.