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Showing results for tags 'parameter'.
Found 6 results
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Hello, I have defined one class "Class A" and when creating instances of that class e.g. A* instA1 = new A (); I want to attach the instA1 object to an sc_in port of my SystemC module as an attribute of that port. - Can I use for that purpose the add_attribute function? - How safe is that? - Are there any other recommended mechanisms (as alternatives)? Thanks. -
I have a class with an sc_event which should be readable and writeable through getter and setter methods. class IntWithEvent { private: sc_event _ev_wr; sc_event _ev_trigger; public: const sc_event& get_write_event() const { return _ev_wr; } const sc_event& get_trigger_event() const { return _ev_trigger; } void set_trigger_event(sc_event &ev) const { _ev_trigger = ev; // E0349 no operator "=" matches these operands } } Writing the getters was no problem. However the setter throws me an error of no matching assignment operator. Do I need to
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Hi, I am working on IPXACTS -RTL representation. I have seen the following in one of my IPXACTS, where parameters are defined. I have a question regarding this value representation in this above IPXACT. Is this valid as per the standards? And does this mean, in RTL, the following: parameter [0:0] RD_ADDR_INI_PIPE_STAGE [NUM_CORE_INI-1:0] = '{1,1}
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Hi, I have a question related to appropriate CCI usage in case of composite IP with top-level configuration parameters. Let's imagine we have a composite IP A that consists of IP B and C, making the A a composite IP, since it consists of multiple IPs. Now let's imagine IP B and C have clock frequency parameter associated. The name of parameter in IP A is clk_frequency and the name of parameter in IP B is clock_frequency. For a sake of better user experience let's image that IP A (a top level one, aggregating B and C) wants to provide a convince top level parameter named clk_freq to ma -
Hello, I've been trying to instantiate (if I'm not mistaken) an array of submodules that were created using sc_vector. So far, I've followed the recommendations for using custom creator functions, but I'm kind of lost at how to actually make it work. Especially with sc_bind, which keeps returning me errors. The module master houses an array of ports that will be connected to a corresponding number of slaves. Order of connection does not matter. I'm using MSVC++ 10. The code is as follows: class top : public sc_module { //Submodule declarations master master_i; sc_vector&l -
There are a number of bit width parameters declared in the my top module. These parameters are passed to the DUT instance and parameterized interface instances. How can I also pass these parameter values to the sequence items, so that the bit widths of the sequence item fields correspond to the bit widths of the interface fields?
