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Found 3 results

  1. I made some examples of SystemC testbench embedding Python, gnuplot. This SystemC testbench can run under ModelSim. With SystemC, I'm sure, there's no need to use weird procedural language interface. If you're interest in this issue, visit and read ad-free my blog page about HLS. Sorrily, it's written in Korean, but there's google translation service. You can find down link to download design sources. https://hls-goodkook.blogspot.com/2021/09/3-c-c-validation.html
  2. Hello, I'm trying to compile a design with a TLM2 socket (simple_initiator_socket) in ModelSim (sccom). So far, the compiler returns an error saying that there is no function called b_transport. Yet I have this same design working in the PoC SC simulator, so I'm guessing that ModelSim is doing things differently than the PoC. However ModelSim does point out an alternative, which was to use blocking_transport_if's version. I believe this was the one used all along in the PoC, and it should be the same in ModelSim. Any ideas? Here are the designs: Initiator /** * RTL-to-TLM2 Adaptor */ ... /** Includes **/ ... #include <tlm.h> #include <tlm_utils/simple_initiator_socket.h> ... struct rtl_to_tlm2_adaptor: public sc_channel { /** TLM-2 simple initiator socket **/ tlm_utils::simple_initiator_socket<rtl_to_tlm2_adaptor> rtt2a_socket; ... /** Adaptor constructor **/ SC_HAS_PROCESS( rtl_to_tlm2_adaptor ); rtl_to_tlm2_adaptor(sc_module_name _name) : sc_module(_name), addr(0), data(0), cmd(tlm::TLM_IGNORE_COMMAND) { // Construct and name socket SC_THREAD(write_thread); // Register adaptor channel thread SC_THREAD(read_thread); // Register read/write method trans = new tlm::tlm_generic_payload; // Create new payload instance } private: ... // Variables defined here /** Methods **/ // Sets up TLM2 payload void payload_setup(tlm::tlm_generic_payload* trans, tlm::tlm_command cmd, signed short& data, uint64 addr) { // Initialize 8 out of the 10 TLM-2 attributes, byte_enable_length and extensions being unused trans->set_command(cmd); trans->set_address(addr); trans->set_data_ptr(reinterpret_cast<unsigned char*>(&data)); trans->set_data_length(MEM_DATA_WORD_LEN); trans->set_streaming_width(MEM_DATA_WORD_LEN); trans->set_byte_enable_ptr(0); trans->set_dmi_allowed(false); trans->set_response_status(tlm::TLM_INCOMPLETE_RESPONSE); } // Local b_transport used to execute the standard TLM2 procedures void local_b_transport() { payload_setup(trans, cmd, data, addr); // Payload setup rtt2a_socket->b_transport(*trans, sc_time(SC_ZERO_TIME)); // Blocking transport call // Initiator obliged to check response status and delay if (trans->is_response_error()) SC_REPORT_ERROR("TLM-2", "Response error from b_transport"); } // Memory write procedure void mem_write() { cmd = tlm::TLM_WRITE_COMMAND; // Set command ... local_b_transport(); // Call local b_transport ... } // Memory read procedure void mem_read() { cmd = tlm::TLM_READ_COMMAND; // Set command ... local_b_transport(); // Call local b_transport ... } }; #endif Target /** * Generic memory instance, mostly inspired by Doulos' example */ ... /** Includes **/ #include <tlm.h> #include <tlm_utils/simple_target_socket.h> ... struct gen_mem: sc_module { /** TLM-2 simple target socket **/ tlm_utils::simple_target_socket<gen_mem> mem_socket; /** Generic memory constructor **/ SC_CTOR(gen_mem) : mem_socket("mem_socket") { // Register callback for incoming b_transport interface method call mem_socket.register_b_transport(this, &gen_mem::b_transport); dont_initialize(); // Mark to not initialize thread // Initialize memory with random data mem_reset(); } // TLM-2 blocking transport method virtual void b_transport(tlm::tlm_generic_payload& trans, sc_time& delay) { tlm::tlm_command cmd = trans.get_command(); // Get command sc_dt::uint64 adr = trans.get_address(); // Get address unsigned char* ptr = trans.get_data_ptr(); // Get data pointer unsigned int len = trans.get_data_length(); // Get data length unsigned char* byt = trans.get_byte_enable_ptr(); // Get byte enable pointer unsigned int wid = trans.get_streaming_width(); // Get streaming width // Obliged to check address range and check for unsupported features if (adr >= sc_dt::uint64(MEM_SIZE) || byt != 0 || len > 16 || wid < len) SC_REPORT_ERROR("TLM-2", "Target does not support given generic payload transaction"); // Obliged to implement read and write commands if (cmd == tlm::TLM_READ_COMMAND) { // Read command memcpy(ptr, &mem[adr], len); // Use memcopy function to copy memory address pointer // cout << sc_time_stamp() << " MEMORY: Reading value " << *(mem+adr) << " @" << adr << endl; } else if (cmd == tlm::TLM_WRITE_COMMAND) { // Write command memcpy(&mem[adr], ptr, len); // Use memcopy function to copy to memory // cout << sc_time_stamp() << " MEMORY: Writing value " << *ptr << " @" << adr << endl; } else if (cmd == tlm::TLM_IGNORE_COMMAND) { // Reset command mem_reset(); // Reset memory // cout << sc_time_stamp() << " MEMORY: Reset requested" << endl; } else SC_REPORT_ERROR("TLM-2", "Command not supported"); // Obliged to set response status to indicate successful completion trans.set_response_status(tlm::TLM_OK_RESPONSE); // Realize wait delay to advance simulation time wait(delay); } private: unsigned short mem[MEM_SIZE]; // Memory array instance void mem_reset() { for (int i = 0; i < MEM_SIZE; i++) mem[i] = 0x21; // 33 in decimals } }; #endif Error printout # Model Technology ModelSim PE sccom 10.4a compiler 2015.03 Mar 25 2015 # # In file included from source/testbench/../module/c/memory.h:11, # from source/testbench/cpu_testbench.h:11, # from source/testbench/cpu_testbench.cpp:5: # source/testbench/../module/c/rtl_to_tlm2_adaptor.h: In member function 'void rtl_to_tlm2_adaptor::local_b_transport()': # source/testbench/../module/c/rtl_to_tlm2_adaptor.h:148: error: no matching function for call to 'tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>::b_transport(tlm::tlm_generic_payload&, sc_core::sc_time)' # C:/modeltech_pe_10.4a\include\systemc/tlm_core/tlm_2/tlm_2_interfaces/tlm_fw_bw_ifs.h:54: note: candidates are: void tlm::tlm_blocking_transport_if<TRANS>::b_transport(TRANS&, sc_core::sc_time&) [with TRANS = tlm::tlm_generic_payload]
  3. Hi everybody, Do I need to do any modifications on my SystemC code in order to simulate it on ModelSim 6.5 Se? And, is there a simple tutorial for this? (The ModelSim User's Manual didn't really help me) Otherwise, is there a better (/easier) simulator? compiler/simulator? Thanks
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