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Showing results for tags 'ipxact'.
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Hi there IPXACT needs to capture array of registers properly in a design. Currently there is only one tag ''spirit:dim" to represent an array of registers. This does not enable us to capture an array of register effectively. Consider the following cases: 1. An array of registers can be one dimensional with each element offset by offset address 0x10. 2. An Array of multidimensional registers something like this: register_1[0][0] -> 0x0 register_1[0][1] -> 0x4 register_1[1][0] -> 0x10 register_1[1][1] -> 0x14 ... likewise Is there any way to capture just the address relationship to an array instance within IP-XACT XML tags? (Without using vendorExtensions tag?) We have not been able to capture the above said information inside IPXACT XML.(using only IP-XACT tags) Requesting thoughts regarding the same. Best regards Balasubramanian G -
Hi, I wanted to know use case of alternate register. Scenario 1(DYNAMIC) : lets take an example, for capturing metadata of a register.The field(1) in register represents data whose context changes when another field (2)is having another data. So in this case h/w changes field (2) data dynamically, changing context of field (1) data. Does alternate register is used in this case? Can multiple "alternate group names" tag be used while instantiating module registers. Scenario 2(STATIC) : According to my understanding, alternate register is used for capturing registers according to mode in which module is to be instantiated i.e. only 1 register definition to be selected from multiple alternate registers while instantiating module registers using single "alternate group name" tag. What is the use case of alternate registers.(Scenario 1 or 2) Thanks -
Hi, I am working on IPXACTS -RTL representation. I have seen the following in one of my IPXACTS, where parameters are defined. I have a question regarding this value representation in this above IPXACT. Is this valid as per the standards? And does this mean, in RTL, the following: parameter [0:0] RD_ADDR_INI_PIPE_STAGE [NUM_CORE_INI-1:0] = '{1,1}
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Hi, I have a question in how glue logics between two or more ports get represented in IPXACT. Lets say there is an ADHOC Connection between, PORT A of instance A and PORT B of instance B, in such a way that, PORTB is connected as 32'habcd ^ PORTA Like, Instance A: output port A Instance B: input port B Now, on Top file, In SV , I have following glue logic. module Top module A instance A( .A(A) ) module B instance B( .B(32'habcd ^ A) //32'habcd XOR with A ) endmodule Now, in adHoc connection,we genrally, represent two connections with just internalportreferences. How does such glue logics get represented? Thanks in advance.
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HI, What is the purpose of the element, ARRAYS present in component IPXACT definition. In the above image, the port has name: defining physical port name, direction: wire direction, vectors: msb and lsb of the port. What I don't understand is the purpose of arrays here. What it implies? Is it kind of multi dimensional port definition. If so, don't we already have indices, index defining them? Thanks in advance, Bhargav K
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Previous versions of IPXACT has attributes, 'left' and 'right' inside internalPortReference element of adHocConnection in design IPXACT as shown in the following 4 lines of xml. <spirit:adHocConnection> <spirit:name>....</spirit:name> <spirit:internalPortReference spirit:ComponentRef = "..." spirit:PortRef=".." spirit:left="..." spirit:right="...."/> </spirit:adHocConnection> These attributes basically say that which vector range of port from one component is mapped to another (I assume) However, the same IPXACT with latest schema, while validation gives schema error stating, attribute right/left is not allowed. Even the latest xsd files available with accellera doesn't define these attributes.There must be some means how currently, these multibit adHocConnections are mapped between two components inside an IPXACT-design. What could be the solution for this?
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Hi All, I am working in verification. Where i have to generate reg_block for all the IP's using IPXACT. also top level reg_block which instantiates all the IP level register block using IPXACT. But i am not interested in Ports/Businterface/component. Please advise me what is the best method to do it. Thanks Saravanan
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Hi, I am using the IPXACT 2009 standard to describe a verilog module. The module has a bunch of parameters and ports whose width depends on these parameters. I had a couple of questions regarding this: 1) Do the parameters go under "<spirit:model>..<spirit:modelParameters>" or under ""<spirit:model><spirit:views><spirit:view><spirit:parameters>" ? 2) From what I understand, there seems to be way to describe variable width ports in the 2014 standard but not in the 2009 standard? Thanks. -
Hi, I'd like to encode the .o/.so buildCommand in IPXACT XML fileSet, such that user can rebuild the .o/.so file from XML. For example, the .o/.so generation command look like this: % g++ -c hello.cpp -o hello.o % g++ hello.o -shared -fPIC -o libhello.so Should I encode XML fileSet like below? <ipxact:fileSet> <ipxact:file> <ipxact:name>hello.cpp</ipxact:name> <ipxact:fileType>cppSource</ipxact:fileType> </ipxact:file> <ipxact:file> <ipxact:name>hello.so</ipxact:name> <ipxact:fileType>swObjectLibrary</ipxact:fileType> <ipxact:buildCommand> <ipxact:command>g++</ipxact:command> <ipxact:flags>hello.o -shared -fPIC -o hello.so</ipxact:flags> <ipxact:targetName>hello.so</ipxact:targetName> </ipxact:buildCommand> <ipxacxt:dependency>hello.o</ipxacxt:dependency> </ipxact:file> <ipxact:file> <ipxact:name>hello.o</ipxact:name> <ipxact:fileType>swObject</ipxact:fileType> <ipxact:buildCommand> <ipxact:command>g++</ipxact:command> <ipxact:flags>-c hello.cpp -o hello.o</ipxact:flags> <ipxact:targetName>hello.o</ipxact:targetName> </ipxact:buildCommand> </ipxact:file> </ipxact:fileSet> Thanks, Justin
