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Hi All, while simulating A2D convertor, I got following problems. Compilation: No Error running .exe file returns the following error message: ----------------------------------------------------------------------------------------------------------------------------------------------------------------- Warning: SystemC-AMS: Initialization for tracing of: CLK failed set wave to 0 In file: sca_trace_object_data.cpp:136 In process: method_p_0 @ 0 s Error: SystemC-AMS: Sample id (0) is greater than delay (0 while initializing port: A2D_dut.a2d.eoc In file: /home/4all/packages/systemc/2.2.0-sl4.5//include/scams/predefined_moc/tdf/sca_tdf_sc_out.h:418 In process: A2D_dut.a2d.sca_implementation_0.cluster_process_0 @ 0 s ----------------------------------------------------------------------------------------------------------------------------------------------------------------- In this regards, I have checked the complete code as well as the the files suggested in error message (/sca_tdf_sc_out.h:418), (sca_trace_object_data.cpp:136), but I did not get any clue. my codes look like this: //A2D.h SCA_TDF_MODULE (a2d_nbit) { //port declaration sca_tdf::sca_in<double> a_in; // analog input pin sca_tdf::sca_de::sca_in<sc_dt::sc_logic> start; //start signal sca_tdf::sca_de::sca_in<bool> clk; //clock signal sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc; //end of conversion pin sca_tdf::sca_de::sca_out<sc_dt::sc_lv<8> > d_out; // digital output signal a2d_nbit(sc_core::sc_module_name nm, double Vmax_ = 5.0, double delay_ = 10.0e-3, int bit_rng = 8): a_in("a_in"), start("start"),clk("clk"), eoc("eoc"), d_out("d_out"), Vmax(Vmax_), delay(delay_), bit_range(bit_rng){} void set_attribute() { set_timestep(1, sc_core::SC_MS); eoc.set_delay(0); } void initialize() { eoc.initialize(sc_dt::SC_LOGIC_0); start.initialize(sc_dt::SC_LOGIC_0); } void processing(); private: double Vmax; // ADC maximum range double delay; // ADC conversion time int bit_range; //vector length of d_temp and d_out }; //A2D_top_level.h SC_MODULE (A2D_top_level) { a2d_nbit a2d; vtg_src input_vtg; sc_core::sc_clock clk1; void start_logic(){ while(true) { start.write(sc_dt::SC_LOGIC_0); wait(20, sc_core::SC_MS); start.write(sc_dt::SC_LOGIC_1); wait(20, sc_core::SC_MS); start.write(sc_dt::SC_LOGIC_0); sc_core::sc_stop(); } } SC_CTOR(A2D_top_level) : in("in"), out("out"), a2d("a2d"), input_vtg("input_vtg"),clk1("clk1",10, 0.5, true), start("start"), eoc("eoc") { input_vtg.out(in); a2d.a_in(in); a2d.start(start); a2d.clk(clk1.signal()); a2d.eoc(eoc); a2d.d_out(out); SC_THREAD(start_logic); } public: sca_tdf::sca_signal <double> in; sc_core::sc_signal<sc_dt::sc_lv<8> > out; sc_core::sc_signal<sc_dt::sc_logic> start; sc_core::sc_signal<sc_dt::sc_logic> eoc; }; //A2D_test.cpp int sc_main(int argc, char* argv[]) { A2D_top_level A2D_dut("A2D_dut"); sca_util :: sca_trace_file* atfs = sca_util :: sca_create_tabular_trace_file("A2D.dat"); sca_util :: sca_trace(atfs, A2D_dut.a2d.clk, "CLK"); sca_util :: sca_trace(atfs, A2D_dut.start, "START"); sca_util :: sca_trace(atfs, A2D_dut.in, "INPUT"); sca_util :: sca_trace(atfs, A2D_dut.out, "OUTPUT"); sca_util :: sca_trace(atfs, A2D_dut.eoc, "EOC"); sc_start(1.5, SC_SEC); sca_util :: sca_close_tabular_trace_file (atfs); return 0; } could you please help in solving this problem.... regards, Milind