In uvm_reg_map::do_bus_read() task, after the call to adapter.bus2reg() function, do_bus_read() function checks for any Xs in data field.
Code from uvm_reg_map:
uvm_reg_bus_op rw_access;
uvm_reg_data_logic_t data;
data = rw_access.data & ((1<<bus_width*8)-1);
rw.status = rw_access.status;
if (rw.status == UVM_IS_OK && (^data) === 1'bx)
rw.status = UVM_HAS_X;
Here, rw_access.data is of type "bit" and is assigned to data which is of type "logic". and then data is checked for Xs. But, as rw_access.data is "bit" type, it will