Search the Community
Showing results for tags 'default'.
I am working on a large project with multiple Verilog/SystemVerilog config-endconfig files. Many of the config files have the statement: default liblist gates_lib work; I understand "default liblist" and the "gates_lib." I have not previously seen the "work" library at the end of the default liblist statement. Can someone explain what this is used for? I don't think there are any libraries specifically defined for "work." This looks like it might be related to separate compilation. The IEEE 1800-2017 Standard does not show any examples with the added "work" library.
May a module or interface have default 'no-connect' port connections, for ports that we don't need to connect? I need to use an interface which is shared between testbenches. I instantiate it a lot and don't use many of the ports (i.e. they can be 'no connects') Using Cadence irun, I get this warning when I don't connect inputs to the interface: ncelab: *W,CUVWSI With tasks/functions, I can have a default value for an input argument. Is there anything similar for interfaces (or modules for that matter)? Rather than creating a bunch of dummy inputs for these ports that are not