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Showing results for tags 'clock'.
Found 3 results
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Hi, I was having few questions regarding clock usage in tlm.These are as folllows:- 1.I wanted to know whether we can supply clock to initiator and target modules. 2.If it can be used ,then how to do we need need to connect to modules.Like instantiate clock in top module and how should we do port or named mapping ? If not,then why its not used ? Because i havent come across any examples in tlm which uses clocks. 3.If we are using blocking interface then using wait statement,just that data doesnot get overidden. And if its a case of nb_interface then we are using de
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Hi, I have came across this counter example from other website. Can u please tell me ,where have we intitialised the main clock. I know the default time period is 1ps,but i am not getting the start of the clock is from which point. I am not knowing the reason for its generation in waveform viewer. Thank you. Below is the code: #include "systemc.h" #include "design.cpp" int sc_main (int argc, char* argv[]) { sc_signal<bool> clock; sc_signal<bool> reset; sc_signal<bool> enable; sc_signal<sc_uint<4> >
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Hi all, i'm implementing a timer/counter(8-bit) that should not increment on every clock and i'm not supposed to provide any input clock port . But i need clock period in my design so my question is " How would i provide clock period(through constructor)?" here is the link to my working code on EDAplayground : http://www.edaplayground.com/x/4_dY if there is any problem in my code please feel free to tell me. regards, jatin
