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India SystemC User Group Conference (ISCUG) A platform to discuss the SystemC based next generation methodologies for design and verification of Electronics Systems (Semiconductor Chips + Embedded Software) Tutorial Day: April 14, 2013 (Sunday) Conference Day: April 15, 2013 (Monday) Venue: Noida, India Register for the event at www.iscug.in. Early bird discount ends on February 28th, 2013. To receive regular updates about the event, register your email at www.iscug.in and follow www.facebook.com/iscug. For sponsorship opportunities, contact firstname.lastname@example.org About ISCUG The India SystemC User's Group (ISCUG) organization aims to accelerate the adoption of SystemC as the open source standard for ESL design. ISCUG provide a platform to share the knowledge, experiences and best practices about SystemC usage. ISCUG organize an annual conference which provides a platform for the SystemC beginners, the SystemC experts, ESL managers and the ESL vendors to share their knowledge, experiences & best practices about SystemC usage. The event will also be useful for: SoC Architects involved in architectural exploration, performance optimization, power optimization etc.. Embedded software engineers who want to explore usage of Virtual Platforms for embedded software development Chip verification engineers who want to explore SystemC based verification methodologies Chip design engineers who want to explore SystemC as the language for chip design at higher abstraction level The event is designed on the pattern of similar events happening worldwide: NASCUG, ESCUG, Japan SystemC Forum, etc. Participate You may participate in ISCUG as a speaker. Submit your abstract at www.iscug.in before February 15, 2013. The abstract will be reviewed by the technical review committee; the committee reserves the right to make final decision on speaker selection. You may present a topic related to SystemC modelling, covering virtual platforms, transaction-level modeling, high-level synthesis, SystemC-AMS, modeling for performance analysis, modellng for architectural exploration, SystemC-based SoC verification methodology, or any other topic related to SystemC modeling. You may also present a success story of SystemC adoption in your company. Tutorial Day: There will be a full day of tutorials running in parallel. To participate as a speaker, send details to email@example.com. First Half (Before Noon): SystemC and TLM 2.0 Introductory Tutorial Second Half (After Noon): Two/three tracks in parallel (details yet to be finalized) Advanced modeling techniques Virtual platforms for embedded software development and pre-silicon HW/SW co-verification High-level synthesis using SystemC SystemC-based verification methodologies Contact Web: www.iscug.in Email: firstname.lastname@example.org
European SystemC Users' Group (ESCUG) Events at DATE 2013
Admin posted a topic in AnnouncementsFollowing are European SystemC Users' Group events at the DATE Conference 2013 in Grenoble, France. 27th European SystemC Users' Group Meeting Tuesday March 19th, 2013 6:30pm - 9:30pm Room TBA Join the Accellera update and town hall meeting around Accellera technologies and standards. We give insights into their influence and requirements for future design strategies. More information, including registration and the final program, will be available at: http://www.ti.uni-tu...10.0.html?&L=0/. European SystemC Users' Group Workshop ESL -- Putting the Pieces Together: Integrating SystemC Design and Verification with AMS and Algorithm Design Friday March 22nd, 2013 8:30am - 4:50pm Room TBA This full-day workshop is focused on the integration of SystemC design and verification with AMS and algorithm design. It gives deep insights on how techniques may collaborate and converge. These topics are gaining more and more interest because a seamless integration of all relevant design and verification techniques is crucial. Besides digital hardware design, this is substantially important for the areas of algorithm and AMS design. The keynote from STMicroelectronics discusses the challenges of design flow integration in multi physical domain applications. The workshop includes four invited sessions from TU Kaiserslautern, NXP, Fraunhofer IIS, and Bosch -- providing knowledge about the core technologies, their application, and integration into ESL design flows. The core session’s part is complemented by an interactive discussion with the audience. This session is organized in town hall meeting style. This event requires registration. For an agenda and to register, see http://www.date-conf...nce/workshop-w1.