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Showing results for tags 'UVM 1.2'.
I have two sequences seq_a and seq_b that can be run on sequencer. In my component i have the code to set the default sequence. Below is the code in component and i am trying to set the default sequence as "seq_b" task run_phase(uvm_phase phase); uvm_config_db #(uvm_object_wrapper)::set(null, "uvm_test_top.my_sequencer.main_phase", "default_sequence", seq_b::type_id::get()); sequencer.start_phase_sequence(phase); endtask: run_phase With this code in component, if i pass the following command lines argument to change the sequence to seq_a: "+uvm_set_default_sequence=*,main_phase,seq_a"
The first video series Introducing What's New in UVM 1.2 is out. Also, here is the UVM 1.2 Class Reference This video series covers the changes and new features introduced in UVM 1.2. It is intended for engineers who are already somewhat familiar with UVM. The series comes with CODE EXAMPLES THAT WORK. That's right, real working code and not just a snippet on a slide. The series has the following parts, covering different areas of UVM 1.2 changes. Recommend viewing in 720p quality or higher. uvm_object must have constructor code example Config DB uvm_enum_wrapper code example s