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Found 8 results

  1. Hi I am working on a project where I have been handed over an xml file that contains details on all the registers. I am guessing it to be Spirit 1.0 for the file begins with <?xml version="1.0" encoding="ISO-8859-1"?> <map> With no prior experience with IP-XACT or any spreadsheet style, I am guessing that this might not be Spirit at all. However, I took my chances and downloaded the xsl(s) for up-conversion available at the following link: http://www.accellera.org/images/downloads/standards/ip-xact/update_scripts.zip I ran the convert_ns.pl using
  2. Hi, I might be asking very basic question as I have just started with IP-XACT. When I try reading the component file in my tool and the busdefinition is in some other directory it throws an error saying this data with VLNV couldn't found, How Do I include the busdefinition xml in component xml? Thanks
  3. Hi all, I'm using vendors' tool to generate register models. I wanna know how to describe one address-block is instantiated multiple times in IP-XACT. For example, there are 2~4 instances of the same DMA engine module in my testbench. Which schema can I use to describe this? The further question is how to group address blocks in IP-XACT? For example, I have a bridge-similar module BRDG(have registers) will be instantiated to more than 20 IPs of SOC. I wanna the generated uvm register model combine each BRDG with related IP in one uvm_reg_block. How to describe this in IP-X
  4. Hi! I'm wondering if the standard Leon2 example for IP-XACT 2009 is still obtainable? Doing my master thesis on IP-XACT, but few tools seem to support IEEE 1685-2014. I've got a version of Leon2 through Magillem, but it does not seem to be the bog standard. BR Eirik
  5. Hello Accellera Forum, I'm trying to execute the IP-XACT example of the Leon2 on the accellera page. I'm using systemc2.3.1 on windows8 with cygwin gcc 4.8.3. I try to run the makefile in the directory TLM2, but I´m getting following error: Makefile:130: recipe for target '../../spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/src/tlmreg_Leon2_uart.o' failed make: [../../spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/src/tlmreg_Leon2_uart.o] Error 127 (ignored) g -m32 -O3 -fpermissive -DVERBOSE_GLOBAL -Wno-deprecated -DSC_INCLUDE_DYNAMIC_PROCESSES -I/cygdrive/c/systemc-2.3.1/
  6. Hi Experts, 1.I have seen that Offsets of a Slave Module is described in the Memory Maps in Component Description. Is it possible to describe Offsets in the top design? The motive is to repeat various instances of a Slave Component in a design, each slave instance having a different Offset. 2. Also, I have a SystemC architecture in which I instantiate the same bus several times. But I connect each bus instance with a different number of modules. This is because the bus possesses MultiPassthrough Sockets. How can I reproduce it in IP-XACT? Should I have a custom Component for each
  7. Hi there I couldn't find enough information about capturing whitebox information with respect to a register defined in IP-XACT standard. Could this be done somehow? The closest that could be found was WHITEBOX information with respect to models.(not registers) Though the register definition can be captured in IP-XACT XML, there isn't proper way to capture RTL implementation of a register in IP-XACT. Capturing RTL implementation of a register in IP-XACT XML would enable us to stitch UVM_REG backdoor access. (without vendorExtensions) We feel the urge/need to enhance IP-XACT standard
  8. Version 5.0


    This download contains a sample UVM environment that shows the use of IDesignSpec Free to generate a UVM Register Model. The input can be SystemRDL, IP-XACT, Word, Excel, XML etc. You can download the Free IDesignSpec Register Generator from here. You can use the included example as a ready reference to generate your own register model. You can use any or all of the IDesignSpec flavors: Word, Excel or Batch.
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