Jump to content

Search the Community

Showing results for tags 'Custom Payload'.

  • Search By Tags

    Type tags separated by commas.

  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV, CRAVE, FC4SC)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM (IEEE 1800.2) - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
  • Portable Stimulus
    • Portable Stimulus Discussion
    • Portable Stimulus 2.0 Public Review Feedback
  • IP Security
    • SA-EDI Standard Discussion
    • IP Security Assurance Whitepaper Discussion
  • IP-XACT
    • IP-XACT Discussion
  • SystemRDL
    • SystemRDL Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Find results in...

Find results that contain...


Date Created

  • Start

    End

Last Updated

  • Start

    End

Filter by number of...

Joined

  • Start

    End

Group

AIM

MSN

Website URL

ICQ

Yahoo

Jabber

Skype

Location

Interests

Biography

Location

Interests

Occupation

Company

Found 1 result

  1. zubin2911
    Hi, I'm newbie to SystemC TLM, coming from SystemVerilog UVM world. I would like to model our RTL in SystemC using TLM2.0 to speed up our Software Development process. Our RTL is not memory mapped bus architecture and we would like to use custom transaction class instead of generic payload. Is it possible to do that using TLM2.0? If yes, could you please provide me with an example. Also, I have four TLM ports communicating with each other in the same model. How does one b_transport method works with all four ports? Is it a good idea to make a model in SystemC rather than having it in SV UVM? Thanks Zubin
×
×
  • Create New...