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  1. Hi everybody! About my model: Here is two different initiators and one target. Initiators makes b_transport to different sockets. first b_transport of each initiator its "req to transition", second - data transition. Could anybody help me to write synch point? My target should will call some behavioral function when all initiators will make "req to transition". Could anybody helps me to change this code? Please, help me! #define SC_INCLUDE_DYNAMIC_PROCESSES #include <systemc.h> #include <tlm.h> #include <tlm_utils\simple_initiator_socket.h> #include <tlm_utils\simple_
  2. Hi everyone, I'm met some problem. In box below you can see my code. struct Some_stuct { int data; float data_f; }; class payload_t { public: unsigned char *data; unsigned lenght; inline friend ostream& operator << ( ostream& os, payload_t const & v ) { os << "(" << v.data << "," << std::boolalpha << "," << v.lenght << ")"; return os; } }; SC_MODULE(tx) { sc_port<sc_fifo_out_if<payload_t> > out_port; void process() { Some_stuct data; payload_t out_data; while(true) { data.data = 5;
  3. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
  4. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
  5. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1);
  6. Hi all, I am working with sc_fixed point types in systemc and i tried a small code with the usage of fixedpoint types. #define SC_INCLUDE_FX #include "systemc.h" #include <stdlib.h> //for srand() and rand() SC_MODULE(rand){ sc_out<sc_ufixed<8,8,SC_TRN,SC_SAT> > output; sc_ufixed<8,8,SC_TRN,SC_SAT> A; void process(){ while(true) { wait(19, SC_NS); A=rand() % 254 ; // range 0 to 253 output.write(A); } } SC_CTOR(rand) { SC_THREAD(process); } }; The above code is just a source module which provides the rand numbers in the fixed point format to the n
  7. Hi all, i am trying to translate a simulink model to system c module. The simulink block is a source block where it generates random number in the range of [ 0 , 253 ] and with a explicit sample period( the block produces outputs and if appropriate, updates its internal state) of 9 ns, and the output of this block is given to the next block with a latency of 1 sample period. i tried to translate this block to a system c module as shown below: #include "systemc.h" #include <stdlib.h> //for srand(uint) and rand() SC_MODULE(RNG){ sc_in_clk clk; sc_out< sc_uint > o
  8. Hell All, I posted a question entitled "Determining source of events using global fifo" on Sep 9, 2013. Surprisingly, I have not got a reply for this post so far. What is wrong with this post? Any idea? Can anyone see my post? Thanks, Alireza
  9. After Signal/Port binding, when signal changed, the sensitive list will cause SC_METHOD registered method to run. When I'm implementing the SystemC version, I met this warning W571. To be honest, I think this warning is correct because there is no activity. But Why there is no activity where I thought there should be is the question. The problem happens when call sc_start() the second time; I suspect that the binding between signal/port is not handing well. SC_MODULE ( MyClass ) { SC_CTOR(MyClass) { SC_METHOD(eventListener); dont_initialize();
  10. Hello, How can i plz define an sc_lv with a variable width ? Thank you for your help
  11. I have designed and developed RTC using systemc language. But there is mismatch between this RTC and original timing? Can anyone tell me the reason for this?
  12. Hello all, What is the difference between mutex and seamaphore? Regards Amit
  13. Hi, I need to make a timing checks for the input signals of a module (e.g., check set-up and hold times are not violated, check Pulse width). Is there any method which would let me do this. If further information is needed, please contact me! Thank you in advance for your help.
  14. Hi, everybody. I'm needing use netbeans IDE to develop systemC projects on windows 7. I installed the netbeans 7.3 and the cygwin with gcc 4.8. the systemC already be installed and working normally in cygwin (I already have used...). recently, I installed systemC on netbeans, that use cygwin compiler, and I can use normally too: netbeans "recognize the systemC language", compile and execute my projects. my only problem is that, on netbeans, the "sc_signal<bool>" is don't recognize. =S the "sc_signal<int>" work, "sc_signal<sc_logic>" work and all the others.... the code w
  15. India SystemC User Group Conference (ISCUG) A platform to discuss the SystemC based next generation methodologies for design and verification of Electronics Systems (Semiconductor Chips + Embedded Software) Tutorial Day: April 14, 2013 (Sunday) Conference Day: April 15, 2013 (Monday) Venue: Noida, India Register for the event at www.iscug.in. Early bird discount ends on February 28th, 2013. To receive regular updates about the event, register your email at www.iscug.in and follow www.facebook.com/iscug. For sponsorship opportunities, contact info@iscug.in About ISCUG The India SystemC
  16. Hi everybody, Do I need to do any modifications on my SystemC code in order to simulate it on ModelSim 6.5 Se? And, is there a simple tutorial for this? (The ModelSim User's Manual didn't really help me) Otherwise, is there a better (/easier) simulator? compiler/simulator? Thanks
  17. Hi, I am new to systemc. I am writing systemc simulator for windows. I need the user to configure and read registers and view statistics. i want it to do it using GUI (online) and not using files. is there any written example for that? Are there any recommended tools? tx, Smadar.
  18. Following are European SystemC Users' Group events at the DATE Conference 2013 in Grenoble, France. 27th European SystemC Users' Group Meeting Tuesday March 19th, 2013 6:30pm - 9:30pm Room TBA Join the Accellera update and town hall meeting around Accellera technologies and standards. We give insights into their influence and requirements for future design strategies. More information, including registration and the final program, will be available at: http://www.ti.uni-tu...10.0.html?&L=0/. European SystemC Users' Group Workshop ESL -- Putting the Pieces Together: Integrating Syste
  19. Hi, I am trying to write a SystemC/TLM front-end. To do so, I need SystemC grammar (at least the TLM part). Does anybody know how and where I can find it? Thank you, Reza
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