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Showing results for tags 'port binding'.
Found 3 results
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Hello, I am currently working on a model that consists of three components: memory, adder and link element between the two of them. The data transmission between them happens via ports that look like sc_in<BasePort*>, so a pointer to the BasePort class. This class only contains the status bits (e.g. valid), while the actual data is part of a child class of BasePort that is just callled Port. Inside the memory an object of type Port will be instatiated, the data will be written to that object, and finally the oject is static casted to an object of type BasePort that will then be writ
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Hi guys I'm working on a simulation system that the connection between components changes during the execution of the system. First time I'm facing this issue and not quite sure if I can change module to module connections during run-time and dynamically. Any thoughts how I can do this in SystemC? Thanks
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Hello Experts, presently I am designing a simple A2D converter in SystemC-AMS. While compiling complier returns with some errors. I would be very thankful to you, if you could comment on the errors messages. // A2D.h #include <systemc-ams> #include <systemc> #include <stdio.h> using namespace std; SCA_TDF_MODULE (a2d_nbit) { //port declaration sca_tdf::sca_in<double> a_in; // analog input pin sca_tdf::sca_de::sca_in<sc_dt::sc_logic> start; //start signal sca_tdf::sca_de::sca_in<sc_dt::sc_logic> clk; //clock signal sca_tdf::sca_de
