Search the Community
Showing results for tags 'SystemVerilog training'.
Found 3 results
I am new to UVM and SystemVerilog. For an effective debugging, I wanted to log my transactions coming from the DUT to the monitor into a text file. Since monitor converts into the transaction format, it becomes easy to log the transactions from monitor but I could not find a workaround to do this task. Can someone help with a solution to this problem? Currently, i am using the AHB protocol and I need to keep track of those AHB transactions coming from the DUT. I need to record the address, Read/Write, count, Data to be read/written and time stamps.
Cliff Cummings, President of Sunburst Design, will be conducting 2-day SystemVerilog / 3-day UVM Verification training in Irvine, CA - June 9-13, and in San Diego, CA - June 16-20. See the sunburst-design.com web page for details.
Open enrollment SystemVerilog Fundamentals and UVM Verification training dates for 2014 have now been set. Training classes start at the end of March 2014 in Santa Clara, CA. See the sunburst-design.com web page for dates, locations and content information. Regards - Cliff Cummings Verilog & SystemVerliog Guru www.sunburst-design.com