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About pushkar.naik

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  1. Thanx for a quick response. I'll look into this mechanism in more details, and get back if i have any further queries.
  2. There is a common requirement that the Read-Only registers like status registers in hardware need to be reflected relatime in its register package counterpart for their current status on every HW update they go through. This may be required since there could e a sequence whose course of action would change immediately upon this status update detection. Is there a mechanism available in UVM Register package to take care of such requirement, without user having to write a sequence to monitor the hardware register ? If not, has the UVM community thought about this requirement ?
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