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DV-E

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  1. Thanks for your response and advice. It is not a full test bench, it is only a test case to demo the issue. As i mentioned at the first line of code // skipped driver and others. `uvm_declare_p_sequencer(xx) is a leftover for my debugging, it should not be there, but it has no effects anyway. The issue is from below while-loop function void uvm_sequencer_base::stop_sequences(); uvm_sequence_base seq_ptr; seq_ptr = m_find_sequence(-1); while (seq_ptr != null) begin kill_sequence(seq_ptr); seq_ptr = m_find_sequence(-1); end endfunction I would like to know in my test case, the usage of uvm_create(item, seqr) along with below two stop_sequences() is incorrect? or there should be an enhancement in UVM IEEE. vsqr.stop_sequences(); vsqr.sqr.stop_sequences(); Thanks
  2. In below test case, I ran into an infinite-loop. Based on uvm reference, it is legal code. I understand where the issue comes from, but wondering if it is a known issue in UVM IEEE. [ //skipped driver and others... import uvm_pkg::*; `include "uvm_macros.svh" // Tranx //********************************* class seqItem extends uvm_sequence_item; `uvm_object_utils(seqItem) function new(string name = "seqItem"); super.new(name); endfunction endclass // bus seq //******************************** class seqr extends uvm_sequencer#(seqItem); `uvm_component_utils(seqr) function new(string name ="seqr", uvm_component p = null); super.new(name, p); endfunction endclass // vir sequencer //********************************************* class vseqr extends uvm_sequencer; `uvm_component_utils(vseqr) seqr sqr; function new(string name ="vseqr", uvm_component p = null); super.new(name, p); endfunction function void build_phase(uvm_phase phase); sqr = seqr::type_id::create("sqr", this); endfunction endclass // sequence //************************************ class seq extends uvm_sequence; `uvm_declare_p_sequencer(vseqr) seqItem item; vseqr vsqr; `uvm_object_utils(seq) function new(string name ="seq"); super.new(name); endfunction task body; `uvm_create(item, vsqr.sqr); // create item on bus sequencer, it is legal code. start_item(item); finish_item(item); endtask endclass //********************************* class test extends uvm_test; `uvm_component_utils(test) seq sq; vseqr vsqr; function new(string name ="test", uvm_component p = null); super.new(name, p); endfunction function void build_phase(uvm_phase phase); super.build_phase(phase); sq = seq::type_id::create("sq"); vsqr =vseqr::type_id::create("vsqr", this); sq.vsqr = this.vsqr; endfunction task run_phase( uvm_phase phase); phase.raise_objection(this); fork sq.start(vsqr); #2; join_any //vsqr.sqr.stop_sequences(); // ok vsqr.stop_sequences(); vsqr.sqr.stop_sequences(); // it goes forever-loop phase.drop_objection(this); endtask endclass module top; test t=new(); initial run_test(); endmodule
  3. A question regarding the usage kill() and m_kill(); in uvm_squence_base.svh : the kill() method defined as below function void kill(); if (m_sequence_process != null) begin // If we are not connected to a sequencer, then issue kill locally. if (m_sequencer == null) begin m_kill(); // We need to drop the objection if we raised it... if (get_automatic_phase_objection()) begin m_safe_drop_starting_phase("automatic phase objection"); end return; end ... function void m_kill(); do_kill(); foreach(children_array[i]) begin i.kill(); end ..... I am debugging an infinite-loop caused by a sequence which never got killed(stop_sequences()) Not sure how above kill() and m_kill() works if I have m_sequencer == null. and using virtual_sequence to control a couple of layers of sub_sequences. Thanks
  4. It is my first time to install SCV. I have Systemc-2.3.3 installed successfully. when i did step6 on INSTALL 6. Compile the package. > gmake (or gmake debug to build debug version of library) Some Solaris systems are unable to compile SCV with optimization enabled (which it is by default). If you run into trouble, try configuring again with the "--disable-opt" option specified on the configure command line. I got below error. Not sure how to fix it Thanks /usr/bin/grep: /glad/common/pkgsData/gcc-v6.3.0p1/Linux/RHEL6.0-2013-x86_64/lib/../lib64/libstdc++.la: No such file or directory /usr/bin/sed: can't read /glad/common/pkgsData/gcc-v6.3.0p1/Linux/RHEL6.0-2013-x86_64/lib/../lib64/libstdc++.la: No such file or directory libtool: link: `/glad/common/pkgsData/gcc-v6.3.0p1/Linux/RHEL6.0-2013-x86_64/lib/../lib64/libstdc++.la' is not a valid libtool archive gmake[2]: *** [libscv.la] Error 1
  5. HI All. I am not sure if we already had this discussion or not. In uvm1.2, it seems get_starting_phase() can only be inside of default tasks (pre/post/body/start) of sequence with uvm_config_db#(....)::set(this,"sqr.main_phase", "default_phase", seq) flow. In below test case, line 10 locked the phase while line 30 try to set_starting_phase(), or anyway document that line 10 is not right usage ? it is not a case in seq.start(..) flow. Thanks AM [/code] import uvm_pkg::*; `include "uvm_macros.svh" class seq extends uvm_sequence; `uvm_object_utils(seq) line 10: uvm_phase phase_ = get_starting_phase(); // not ok. this will lock the phase function new(string name ="seq"); super.new(name); endfunction task pre_body(); // uvm_phase phase_ = get_starting_phase(); //ok if( phase_ != null) phase_.raise_objection(this); endtask task body; #10; `uvm_info("whatever", "whatever", UVM_LOW); endtask task post_body(); // uvm_phase phase_ = get_starting_phase(); //ok if( phase_ != null) phase_.drop_objection(this); endtask endclass class seqr extends uvm_sequencer; `uvm_component_utils(seqr); function new(string name = "seqr", uvm_component p = null); super.new(name, p); endfunction endclass class test extends uvm_test; `uvm_component_utils(test) seqr sqr; seq sq; function new(string name ="test", uvm_component p = null); super.new(name, p); endfunction function void build_phase(uvm_phase phase); sqr = seqr::type_id::create("sqr",this); // sq = seq::type_id::create("sq"); line 30 : uvm_config_db#(uvm_object_wrapper)::set(this,"sqr.run_phase", "default_sequence", seq::type_id::get()); // not ok, it tries to set_starting_phase() but phase is locked. endfunction task run_phase(uvm_phase phase); //phase.raise_objection(this); // this flow is ok //sq.start(this.sqr); //phase.drop_objection(this); endtask endclass module top; test t=new(); initial run_test(); endmodule
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