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venravi

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  1. Hi, While migrating code from UVM 1.0ea to UVM 1.0p1 I had noticed a change that was unrelated to the behavioral code in place. The issue was that a signal value that was used by behavioral code at clock edge was valid for UVM 1.0ea and hence the behavioral code used to work correctly. With UVM 1.0p1 the same behavioral code had to capture the signal value at posedge because time was lapsed(delta cycles) between the point the get_next_item/try_next_item block is used in the driver. If the signal was not captured before try_next_item/get_next_item step the methods/functions/tasks which use
  2. Hi, While migrating code base from 1.0EA to 1.0p1 I am having issues registering sequences to the virtual sequencer. In 1.0ea sequences were registered to virtual sequencer with the following macro. `uvm_sequence_utils(BufferingVirtualSeq, RtrVirtualSequencer) The sequence was registered in 1.0ea. Part of the migration I had to change the macro to the following. `uvm_object_utils(BufferingVirtualSeq) `uvm_declare_p_sequencer(RtrVirtualSequencer) When I try to read the number of sequences registered to the sequencer(virtual sequencer) with the following line I get a a value
  3. Hi, umv_register_sequence is deprecated with 1.0p1. Does anyone know of a work around used to migrate 1.0EA code that used uvm_register_sequence to 1.0p1? Thanks Ravi
  4. Hi, The following error is seen with MTI10.0b UVM scoreboard connection. Error: (vsim-3978) /scratch/venravi/linux32/install/studio-5.4/../axi-2.1/lib/sv/AxiMasBriEnv.sv(156): Illegal assignment to class type uvm_port_base #(class uvm_tlm_if_base__3) [in mtiUvm/uvm_pkg::uvm_port_base::uvm_port_base__6] from class type uvm_analysis_imp #(class SonicsTransaction, class masBriFuncCovMonitor) [in mtiUvm/uvm_pkg::uvm_analysis_imp::uvm_analysis_imp__7] Time: 0 ps Iteration: 0 Region: /AxiMasBriPkg File: /scratch/venravi/linux32/install/studio-5.4/../axi-2.1/lib/sv/AxiMasBriPkg.sv Error: (vsi
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