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Posts posted by nirmish

  1. I would recommend to get the get the interface handle inside the sequencer's build phase( the way we do in the monitor & driver)



    sequence is static block, static in the sense that it will be not be destroyed and created like the sequences.


    sequences are not extended from the uvm_component so they dont have access to phasing.


    you can use p_sequencer handle inside the sequences to access the sequence properties, you have to declare the `uvm_declare_p_sequencer(sample_agent_sequencer) inside sequences to access the p_sequencer handle.




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