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Everything posted by nirmish

  1. I would recommend to get the get the interface handle inside the sequencer's build phase( the way we do in the monitor & driver) sequence is static block, static in the sense that it will be not be destroyed and created like the sequences. sequences are not extended from the uvm_component so they dont have access to phasing. you can use p_sequencer handle inside the sequences to access the sequence properties, you have to declare the `uvm_declare_p_sequencer(sample_agent_sequencer) inside sequences to access the p_sequencer handle. Thanks Nirmish
  2. We can do this but which sequence would be picked by sequencer is not sure. Don't forget that eventually there is one driver only to execute the sequence. Hence practically it will not work yeah but you can push two sequence at a time. Good luck Thanks Nirmish
  3. hi Karandeep, you can do one more thing. you can use following approach, `uvm_create(seq); seq.<constraint_name>.constrant_mode(0) seq.jelly_bean = 1. seq.strat(seqr_name) In this case you need to overwrite the constraint, and not required to even extend the class hope this will help you code may not be executable
  4. I did this long back, I had modeled two agents ( one for RX path and one for TX path). and an APB VIP for configuring registers ( on some different clk) I think I did not see any issue in that. does your driver is common for all these sequencers ? if no then I don't see any issue there, it should work. Please send an error you are getting, if any
  5. Another Simple use case of polymorphism is callbacks.... in driver classes you call the methods [pre* , *post] which are defined in façade class. Now when you extend these façade class you provide definition to these method, once these extended callback classes are added to queue of these callback class then during execution of test case functionality of these redefined method will be called by using the handle of old class... this is possible by polymorphism... hope it helps and clear to you :-)
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