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sergeyb

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  1. David, thank you for answering. I have no any my code included. Just trying to compile UVM 1.2 (copied whole folder "src"). Tool is Modelsim Altera Starter 10.3d Thanks , Sergei vlog -work work -sv -stats=none src/uvm_pkg.sv +incdir+./src # Model Technology ModelSim ALTERA vlog 10.3d Compiler 2014.10 Oct 7 2014 # -- Compiling package uvm_pkg # ** Error: ./src/base/uvm_object_globals.svh(141): (vlog-2999) Enum literal 'UVM_DEEP' width (32) must match enum's witdth(28). # # ** Error: ./src/base/uvm_object_globals.svh(142): (vlog-2999) Enum literal 'UVM_SHALLOW' width (32) must match enum's witdth(28). # # ** Error: ./src/base/uvm_object_globals.svh(143): (vlog-2999) Enum literal 'UVM_REFERENCE' width (32) must match enum's witdth(28). # # ** Warning: ./src/seq/uvm_sequencer_base.svh(1381): (vlog-2186) SystemVerilog testbench feature # # (randomization, coverage or assertion) detected in the design. # # These features are only supported in Questasim. # # ** Warning: ./src/reg/uvm_mem_mam.svh(701): (vlog-2186) SystemVerilog testbench feature # # (randomization, coverage or assertion) detected in the design. # # These features are only supported in Questasim. # # ** Warning: ./src/seq/uvm_sequence_library.svh(766): (vlog-2186) SystemVerilog testbench feature # # (randomization, coverage or assertion) detected in the design. # # These features are only supported in Questasim. # # c:/altera/15.0/modelsim_ase/win32aloem/vlog failed.
  2. tried to compile but was not successfull # Model Technology ModelSim ALTERA vlog 10.3d Compiler 2014.10 Oct 7 2014 # -- Compiling package uvm_pkg # ** Error: ./src/base/uvm_object_globals.svh(141): (vlog-2999) Enum literal 'UVM_DEEP' width (32) must match enum's witdth(28). # # ** Error: ./src/base/uvm_object_globals.svh(142): (vlog-2999) Enum literal 'UVM_SHALLOW' width (32) must match enum's witdth(28). # # ** Error: ./src/base/uvm_object_globals.svh(143): (vlog-2999) Enum literal 'UVM_REFERENCE' width (32) must match enum's witdth(28). Thanks in advance Sergei
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