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Lohith

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  1. Hi I am using uvm1.2. But still see this X in my regmodel mirror value as below. Please do let me know what could be the issue. UVM_ERROR /pga/cadence/xcelium/18.09.001/tools.lnx86/methodology/UVM/CDNS-1.2/sv/src/reg/uvm_reg.svh(2899) @ 1629854ns: reporter [RegModel] Register "ral_soc.regmodel_ATB.MODE" value read from DUT (0x0000000000000000) does not match mirrored value (0x00000000X0000000) Below is the reg definition this.ATB_READY = uvm_reg_field::type_id::create("ATB_READY",,get_full_name()); this.ATB_READY.configure(this, 1, 29, "RO", 0, 1'h1, 1, 0, 0); this.ATB_SW_RST = uvm_reg_field::type_id::create("ATB_SW_RST",,get_full_name()); this.ATB_SW_RST.configure(this, 1, 30, "WO", 0, 1'h0, 1, 0, 0); this.ATB_EN = uvm_reg_field::type_id::create("ATB_EN",,get_full_name()); this.ATB_EN.configure(this, 1, 31, "RW", 0, 1'h0, 1, 0, 0); Thanks, Lohith
  2. Hi May i know how you fixed the issue. I am also facing a same issue. I am trying to read the default values of the registers. I see correct values on the waves but still i see mismatch msg in the logs. Thanks in advance
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