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  1. Thank you so much, I will working hard on your example.
  2. Can someone give me some idea of CPU TLM modeling. Thank you very much.
  3. Hi, I am a noob of systemC and tlm modeling. I just go through same example of systemC TLM modeling, such as “”simple_bus“”. I am trying develop a TLM processor model. This processor is high performance out of oroder processor(more than 10 stages). At first, i am focusing on the performance affected by branch prediction. Is there any examples related to TLM processor modelling? Thank you very much.
  4. many thanks, i have a better understand of block and non-block now.
  5. Thanks, it works well now. In addition, I insert :"input.num_available()" before input.read(). I am curious that the "input.num_available()" is 0 ,but it still can output data. Ran
  6. #include "systemc.h" SC_MODULE(DF_Adder){ sc_fifo_in<int> input1, input2; sc_fifo_out<int> output; void process(){ while (1) { output.write(input1.read() + input2.read()); } } SC_CTOR(DF_Adder) {SC_THREAD(process);} }; SC_MODULE(DF_Const){ sc_fifo_out<int> output; void process() { while (1) { output.write(constant_); } } SC_HAS_PROCESS(DF_Const); DF_Const(sc_module_name N, int C): sc_module(N), constant_(C) { SC_THREAD(process); } int constant_; }; SC_MODULE(DF_Fork){ sc_fifo_in<int> input; sc_fifo_out<int> output1,output2; void p
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