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  1. Hi David and Eyck, thank you very much for your answers ! Indeed, it works very well this way.
  2. I am trying to make a circuit which computes the carries for an addition. In this piece of code, I would like to connect the output port rOut of the submodule pg to two output ports (rOut and carries[0]) of the parent module, so both get the same value. template<> struct Carries<1> : ::sc_core::sc_module { sc_vector<sc_in<bool>> a, b; sc_in<bool> rIn; sc_out<bool> p, g, rOut; sc_vector<sc_out<bool>> carries; CarryPropGen pg {"PG"}; SC_CTOR(Carries) : a {"vectA", 1}, b {"vectB", 1}, rI
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